Searched refs:MC_VM_MD_L1_TLB0_CNTL (Results 1 – 4 of 4) sorted by relevance
913 WREG32(MC_VM_MD_L1_TLB0_CNTL, tmp); in rv770_pcie_gart_enable()956 WREG32(MC_VM_MD_L1_TLB0_CNTL, tmp); in rv770_pcie_gart_disable()990 WREG32(MC_VM_MD_L1_TLB0_CNTL, tmp); in rv770_agp_enable()
474 #define MC_VM_MD_L1_TLB0_CNTL 0x2654 macro
2407 WREG32(MC_VM_MD_L1_TLB0_CNTL, tmp); in evergreen_pcie_gart_enable()2452 WREG32(MC_VM_MD_L1_TLB0_CNTL, tmp); in evergreen_pcie_gart_disable()2485 WREG32(MC_VM_MD_L1_TLB0_CNTL, tmp); in evergreen_agp_enable()
964 #define MC_VM_MD_L1_TLB0_CNTL 0x2654 macro