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Searched refs:MC_VM_MD_L1_TLB2_CNTL (Results 1 – 4 of 4) sorted by relevance

/dragonfly/sys/dev/drm/radeon/
H A Drv770.c915 WREG32(MC_VM_MD_L1_TLB2_CNTL, tmp); in rv770_pcie_gart_enable()
958 WREG32(MC_VM_MD_L1_TLB2_CNTL, tmp); in rv770_pcie_gart_disable()
992 WREG32(MC_VM_MD_L1_TLB2_CNTL, tmp); in rv770_agp_enable()
H A Drv770d.h476 #define MC_VM_MD_L1_TLB2_CNTL 0x265C macro
H A Devergreen.c2409 WREG32(MC_VM_MD_L1_TLB2_CNTL, tmp); in evergreen_pcie_gart_enable()
2454 WREG32(MC_VM_MD_L1_TLB2_CNTL, tmp); in evergreen_pcie_gart_disable()
2487 WREG32(MC_VM_MD_L1_TLB2_CNTL, tmp); in evergreen_agp_enable()
H A Devergreend.h966 #define MC_VM_MD_L1_TLB2_CNTL 0x265C macro