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Searched refs:PHM_PlatformCaps_UVDDPM (Results 1 – 9 of 9) sorted by relevance

/dragonfly/sys/dev/drm/amd/powerplay/inc/
H A Dhardwaremanager.h152 PHM_PlatformCaps_UVDDPM, /* UVD clock DPM */ enumerator
/dragonfly/sys/dev/drm/amd/powerplay/hwmgr/
H A Dhwmgr.c410 phm_cap_set(hwmgr->platform_descriptor.platformCaps, PHM_PlatformCaps_UVDDPM); in hwmgr_init_default_caps()
H A Dsmu8_hwmgr.c219 PHM_PlatformCaps_UVDDPM); in smu8_initialize_dpm_defaults()
1822 PHM_PlatformCaps_UVDDPM)) { in smu8_enable_disable_uvd_dpm()
H A Dvega10_hwmgr.c279 PHM_PlatformCaps_UVDDPM); in vega10_set_features_platform_caps()
424 if (PP_CAP(PHM_PlatformCaps_UVDDPM)) in vega10_init_dpm_defaults()
/dragonfly/sys/dev/drm/amd/powerplay/smumgr/
H A Dci_smumgr.c2867 if (PP_CAP(PHM_PlatformCaps_UVDDPM) || uvd_table->count <= 0) in ci_update_uvd_smc_table()
2880 if (hwmgr->dpm_level & profile_mode_mask || !PP_CAP(PHM_PlatformCaps_UVDDPM)) in ci_update_uvd_smc_table()
H A Dvegam_smumgr.c355 PHM_PlatformCaps_UVDDPM) || in vegam_update_uvd_smc_table()
H A Dfiji_smumgr.c2398 PHM_PlatformCaps_UVDDPM) || in fiji_update_uvd_smc_table()
H A Dpolaris10_smumgr.c2145 PHM_PlatformCaps_UVDDPM) || in polaris10_update_uvd_smc_table()
H A Dtonga_smumgr.c2688 PHM_PlatformCaps_UVDDPM) || in tonga_update_uvd_smc_table()