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Searched refs:PHY_AUX_CNTL__AUX_PAD_RXSEL__SHIFT (Results 1 – 7 of 7) sorted by relevance

/dragonfly/sys/dev/drm/amd/include/asic_reg/dce/
H A Ddce_6_0_sh_mask.h8150 #define PHY_AUX_CNTL__AUX_PAD_RXSEL__SHIFT 0x00000010 macro
H A Ddce_8_0_sh_mask.h4132 #define PHY_AUX_CNTL__AUX_PAD_RXSEL__SHIFT 0x10 macro
H A Ddce_10_0_sh_mask.h4076 #define PHY_AUX_CNTL__AUX_PAD_RXSEL__SHIFT 0x10 macro
H A Ddce_11_0_sh_mask.h4190 #define PHY_AUX_CNTL__AUX_PAD_RXSEL__SHIFT 0x10 macro
H A Ddce_11_2_sh_mask.h4634 #define PHY_AUX_CNTL__AUX_PAD_RXSEL__SHIFT 0x10 macro
H A Ddce_12_0_sh_mask.h10573 #define PHY_AUX_CNTL__AUX_PAD_RXSEL__SHIFT … macro
/dragonfly/sys/dev/drm/amd/include/asic_reg/dcn/
H A Ddcn_1_0_sh_mask.h41183 #define PHY_AUX_CNTL__AUX_PAD_RXSEL__SHIFT … macro