Searched refs:PIPE_CONFIG (Results 1 – 9 of 9) sorted by relevance
2245 PIPE_CONFIG(ADDR_SURF_P2) | in gfx_v8_0_tiling_mode_table_init()2249 PIPE_CONFIG(ADDR_SURF_P2) | in gfx_v8_0_tiling_mode_table_init()2253 PIPE_CONFIG(ADDR_SURF_P2) | in gfx_v8_0_tiling_mode_table_init()2257 PIPE_CONFIG(ADDR_SURF_P2) | in gfx_v8_0_tiling_mode_table_init()2261 PIPE_CONFIG(ADDR_SURF_P2) | in gfx_v8_0_tiling_mode_table_init()2265 PIPE_CONFIG(ADDR_SURF_P2) | in gfx_v8_0_tiling_mode_table_init()2269 PIPE_CONFIG(ADDR_SURF_P2) | in gfx_v8_0_tiling_mode_table_init()2273 PIPE_CONFIG(ADDR_SURF_P2)); in gfx_v8_0_tiling_mode_table_init()2275 PIPE_CONFIG(ADDR_SURF_P2) | in gfx_v8_0_tiling_mode_table_init()3200 PIPE_CONFIG(ADDR_SURF_P2) | in gfx_v8_0_tiling_mode_table_init()[all …]
192 # define PIPE_CONFIG(x) ((x) << 6) macro
1872 pipe_config = AMDGPU_TILING_GET(tiling_flags, PIPE_CONFIG); in dce_v10_0_crtc_do_set_base()
1914 pipe_config = AMDGPU_TILING_GET(tiling_flags, PIPE_CONFIG); in dce_v11_0_crtc_do_set_base()
2898 PIPE_CONFIG(ADDR_SURF_P2) | in cik_tiling_mode_table_init()2902 PIPE_CONFIG(ADDR_SURF_P2) | in cik_tiling_mode_table_init()2906 PIPE_CONFIG(ADDR_SURF_P2) | in cik_tiling_mode_table_init()2910 PIPE_CONFIG(ADDR_SURF_P2) | in cik_tiling_mode_table_init()2914 PIPE_CONFIG(ADDR_SURF_P2) | in cik_tiling_mode_table_init()2917 PIPE_CONFIG(ADDR_SURF_P2) | in cik_tiling_mode_table_init()2921 PIPE_CONFIG(ADDR_SURF_P2) | in cik_tiling_mode_table_init()2925 PIPE_CONFIG(ADDR_SURF_P2) | in cik_tiling_mode_table_init()2928 PIPE_CONFIG(ADDR_SURF_P2); in cik_tiling_mode_table_init()2931 PIPE_CONFIG(ADDR_SURF_P2)); in cik_tiling_mode_table_init()[all …]
2723 PIPE_CONFIG(ADDR_SURF_P4_8x16) | in si_tiling_mode_table_init()2732 PIPE_CONFIG(ADDR_SURF_P4_8x16) | in si_tiling_mode_table_init()2741 PIPE_CONFIG(ADDR_SURF_P4_8x16) | in si_tiling_mode_table_init()2750 PIPE_CONFIG(ADDR_SURF_P4_8x16) | in si_tiling_mode_table_init()2759 PIPE_CONFIG(ADDR_SURF_P4_8x16) | in si_tiling_mode_table_init()2768 PIPE_CONFIG(ADDR_SURF_P4_8x16) | in si_tiling_mode_table_init()2777 PIPE_CONFIG(ADDR_SURF_P4_8x16) | in si_tiling_mode_table_init()2786 PIPE_CONFIG(ADDR_SURF_P4_8x16) | in si_tiling_mode_table_init()2795 PIPE_CONFIG(ADDR_SURF_P4_8x16) | in si_tiling_mode_table_init()2804 PIPE_CONFIG(ADDR_SURF_P4_8x16) | in si_tiling_mode_table_init()[all …]
1185 # define PIPE_CONFIG(x) ((x) << 6) macro
1225 # define PIPE_CONFIG(x) ((x) << 6) macro
2107 AMDGPU_TILING_GET(tiling_flags, PIPE_CONFIG); in fill_plane_attributes_from_fb()