Searched refs:RADEON_NUM_RINGS (Results 1 – 10 of 10) sorted by relevance
463 for (i = 0; i < RADEON_NUM_RINGS; ++i) { in radeon_fence_any_seq_signaled()498 for (i = 0; i < RADEON_NUM_RINGS; ++i) { in radeon_fence_wait_seq_timeout()519 for (i = 0; i < RADEON_NUM_RINGS; ++i) { in radeon_fence_wait_seq_timeout()545 u64 seq[RADEON_NUM_RINGS] = {}; in radeon_fence_wait_timeout()608 u64 seq[RADEON_NUM_RINGS]; in radeon_fence_wait_any()612 for (i = 0; i < RADEON_NUM_RINGS; ++i) { in radeon_fence_wait_any()646 u64 seq[RADEON_NUM_RINGS] = {}; in radeon_fence_wait_next()673 u64 seq[RADEON_NUM_RINGS] = {}; in radeon_fence_wait_empty()806 for (i = 0; i < RADEON_NUM_RINGS; ++i) { in radeon_fence_note_sync()883 for (i = 0; i < RADEON_NUM_RINGS; ++i) in radeon_fence_driver_init_ring()[all …]
63 for (i = 0; i < RADEON_NUM_RINGS; ++i) { in radeon_sa_bo_manager_init()230 for (i = 0; i < RADEON_NUM_RINGS; ++i) { in radeon_sa_event()267 for (i = 0; i < RADEON_NUM_RINGS; ++i) { in radeon_sa_bo_next_hole()317 struct radeon_fence *fences[RADEON_NUM_RINGS]; in radeon_sa_bo_new()318 unsigned tries[RADEON_NUM_RINGS]; in radeon_sa_bo_new()335 for (i = 0; i < RADEON_NUM_RINGS; ++i) { in radeon_sa_bo_new()352 for (i = 0; i < RADEON_NUM_RINGS; ++i) in radeon_sa_bo_new()357 for (i = 0; i < RADEON_NUM_RINGS; ++i) in radeon_sa_bo_new()
49 for (i = 0; i < RADEON_NUM_RINGS; ++i) in radeon_sync_create()144 for (i = 0; i < RADEON_NUM_RINGS; ++i) { in radeon_sync_rings()
1330 for (i = 0; i < RADEON_NUM_RINGS; i++) { in radeon_device_init()1333 rdev->fence_context = dma_fence_context_alloc(RADEON_NUM_RINGS); in radeon_device_init()1686 for (i = 0; i < RADEON_NUM_RINGS; i++) { in radeon_suspend_kms()1863 unsigned ring_sizes[RADEON_NUM_RINGS]; in radeon_gpu_reset()1864 uint32_t *ring_data[RADEON_NUM_RINGS]; in radeon_gpu_reset()1886 for (i = 0; i < RADEON_NUM_RINGS; ++i) { in radeon_gpu_reset()1904 for (i = 0; i < RADEON_NUM_RINGS; ++i) { in radeon_gpu_reset()
126 for (i = 0; i < RADEON_NUM_RINGS; i++) in radeon_driver_irq_preinstall_kms()180 for (i = 0; i < RADEON_NUM_RINGS; i++) in radeon_driver_irq_uninstall_kms()
180 struct radeon_fence *best[RADEON_NUM_RINGS] = {}; in radeon_vm_grab_id()1008 for (i = 0; i < RADEON_NUM_RINGS; ++i) in radeon_vm_bo_update()1183 for (i = 0; i < RADEON_NUM_RINGS; ++i) { in radeon_vm_init()1274 for (i = 0; i < RADEON_NUM_RINGS; ++i) {
162 #define RADEON_NUM_RINGS 8 macro370 uint64_t sync_seq[RADEON_NUM_RINGS];555 struct list_head flist[RADEON_NUM_RINGS];622 struct radeon_fence *sync_to[RADEON_NUM_RINGS];809 atomic_t ring_int[RADEON_NUM_RINGS];957 struct radeon_vm_id ids[RADEON_NUM_RINGS];1898 const struct radeon_asic_ring *ring[RADEON_NUM_RINGS];2383 struct radeon_fence_driver fence_drv[RADEON_NUM_RINGS];2387 struct radeon_ring ring[RADEON_NUM_RINGS];
262 for (i = 0; i < RADEON_NUM_RINGS; ++i) { in radeon_ib_ring_tests()
529 for (i = 1; i < RADEON_NUM_RINGS; ++i) { in radeon_test_syncing()
265 for (i = 0; i < RADEON_NUM_RINGS; i++) { in radeon_pm_set_clocks()1145 for (i = 0; i < RADEON_NUM_RINGS; i++) { in radeon_dpm_change_power_state_locked()1904 for (i = 0; i < RADEON_NUM_RINGS; ++i) { in radeon_dynpm_idle_work_handler()