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Searched refs:SCLK_DEEP_SLEEP_MISC_CNTL__DPM_DS_DIV_ID__SHIFT (Results 1 – 7 of 7) sorted by relevance

/dragonfly/sys/dev/drm/amd/include/asic_reg/smu/
H A Dsmu_8_0_sh_mask.h2622 #define SCLK_DEEP_SLEEP_MISC_CNTL__DPM_DS_DIV_ID__SHIFT 0x0 macro
H A Dsmu_7_0_0_sh_mask.h3676 #define SCLK_DEEP_SLEEP_MISC_CNTL__DPM_DS_DIV_ID__SHIFT 0x0 macro
H A Dsmu_7_1_1_sh_mask.h4294 #define SCLK_DEEP_SLEEP_MISC_CNTL__DPM_DS_DIV_ID__SHIFT 0x0 macro
H A Dsmu_7_0_1_sh_mask.h5114 #define SCLK_DEEP_SLEEP_MISC_CNTL__DPM_DS_DIV_ID__SHIFT 0x0 macro
H A Dsmu_7_1_0_sh_mask.h5306 #define SCLK_DEEP_SLEEP_MISC_CNTL__DPM_DS_DIV_ID__SHIFT 0x0 macro
H A Dsmu_7_1_2_sh_mask.h5414 #define SCLK_DEEP_SLEEP_MISC_CNTL__DPM_DS_DIV_ID__SHIFT 0x0 macro
H A Dsmu_7_1_3_sh_mask.h5318 #define SCLK_DEEP_SLEEP_MISC_CNTL__DPM_DS_DIV_ID__SHIFT 0x0 macro