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Searched refs:SCLK_PWRMGT_CNTL__RESERVED_0_MASK (Results 1 – 4 of 4) sorted by relevance

/dragonfly/sys/dev/drm/amd/include/asic_reg/smu/
H A Dsmu_8_0_sh_mask.h1961 #define SCLK_PWRMGT_CNTL__RESERVED_0_MASK 0x40 macro
H A Dsmu_7_0_0_sh_mask.h2991 #define SCLK_PWRMGT_CNTL__RESERVED_0_MASK 0x40 macro
H A Dsmu_7_0_1_sh_mask.h4429 #define SCLK_PWRMGT_CNTL__RESERVED_0_MASK 0x40 macro
H A Dsmu_7_1_0_sh_mask.h4621 #define SCLK_PWRMGT_CNTL__RESERVED_0_MASK 0x40 macro