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Searched refs:SDMA0_EDC_CONFIG__ECC_INT_ENABLE__SHIFT (Results 1 – 6 of 6) sorted by relevance

/dragonfly/sys/dev/drm/amd/include/asic_reg/sdma0/
H A Dsdma0_4_1_sh_mask.h646 #define SDMA0_EDC_CONFIG__ECC_INT_ENABLE__SHIFT … macro
H A Dsdma0_4_0_sh_mask.h647 #define SDMA0_EDC_CONFIG__ECC_INT_ENABLE__SHIFT 0x2 macro
/dragonfly/sys/dev/drm/amd/include/asic_reg/oss/
H A Doss_2_0_sh_mask.h1064 #define SDMA0_EDC_CONFIG__ECC_INT_ENABLE__SHIFT 0x2 macro
H A Doss_2_4_sh_mask.h1154 #define SDMA0_EDC_CONFIG__ECC_INT_ENABLE__SHIFT 0x2 macro
H A Doss_3_0_1_sh_mask.h1174 #define SDMA0_EDC_CONFIG__ECC_INT_ENABLE__SHIFT 0x2 macro
H A Doss_3_0_sh_mask.h1680 #define SDMA0_EDC_CONFIG__ECC_INT_ENABLE__SHIFT 0x2 macro