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Searched refs:SDMA0_PERFMON_CNTL__PERF_SEL1__SHIFT (Results 1 – 6 of 6) sorted by relevance

/dragonfly/sys/dev/drm/amd/include/asic_reg/sdma0/
H A Dsdma0_4_1_sh_mask.h1024 #define SDMA0_PERFMON_CNTL__PERF_SEL1__SHIFT … macro
H A Dsdma0_4_0_sh_mask.h1032 #define SDMA0_PERFMON_CNTL__PERF_SEL1__SHIFT 0xc macro
/dragonfly/sys/dev/drm/amd/include/asic_reg/oss/
H A Doss_2_0_sh_mask.h998 #define SDMA0_PERFMON_CNTL__PERF_SEL1__SHIFT 0xa macro
H A Doss_2_4_sh_mask.h1084 #define SDMA0_PERFMON_CNTL__PERF_SEL1__SHIFT 0xa macro
H A Doss_3_0_1_sh_mask.h1104 #define SDMA0_PERFMON_CNTL__PERF_SEL1__SHIFT 0xc macro
H A Doss_3_0_sh_mask.h1610 #define SDMA0_PERFMON_CNTL__PERF_SEL1__SHIFT 0xa macro