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Searched refs:SDMA0_PHASE0_QUANTUM__UNIT__SHIFT (Results 1 – 8 of 8) sorted by relevance

/dragonfly/sys/dev/drm/amd/amdgpu/
H A Dsdma_v3_0.c566 SDMA0_PHASE0_QUANTUM__UNIT__SHIFT)) { in sdma_v3_0_ctx_switch_enable()
570 SDMA0_PHASE0_QUANTUM__UNIT__SHIFT); in sdma_v3_0_ctx_switch_enable()
577 unit << SDMA0_PHASE0_QUANTUM__UNIT__SHIFT; in sdma_v3_0_ctx_switch_enable()
H A Dsdma_v4_0.c553 SDMA0_PHASE0_QUANTUM__UNIT__SHIFT)) { in sdma_v4_0_ctx_switch_enable()
557 SDMA0_PHASE0_QUANTUM__UNIT__SHIFT); in sdma_v4_0_ctx_switch_enable()
564 unit << SDMA0_PHASE0_QUANTUM__UNIT__SHIFT; in sdma_v4_0_ctx_switch_enable()
/dragonfly/sys/dev/drm/amd/include/asic_reg/sdma0/
H A Dsdma0_4_1_sh_mask.h595 #define SDMA0_PHASE0_QUANTUM__UNIT__SHIFT … macro
H A Dsdma0_4_0_sh_mask.h596 #define SDMA0_PHASE0_QUANTUM__UNIT__SHIFT 0x0 macro
/dragonfly/sys/dev/drm/amd/include/asic_reg/oss/
H A Doss_2_0_sh_mask.h1012 #define SDMA0_PHASE0_QUANTUM__UNIT__SHIFT 0x0 macro
H A Doss_2_4_sh_mask.h1102 #define SDMA0_PHASE0_QUANTUM__UNIT__SHIFT 0x0 macro
H A Doss_3_0_1_sh_mask.h1122 #define SDMA0_PHASE0_QUANTUM__UNIT__SHIFT 0x0 macro
H A Doss_3_0_sh_mask.h1628 #define SDMA0_PHASE0_QUANTUM__UNIT__SHIFT 0x0 macro