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Searched refs:SDMA0_POWER_CNTL__MEM_POWER_LS_EN__SHIFT (Results 1 – 4 of 4) sorted by relevance

/dragonfly/sys/dev/drm/amd/include/asic_reg/sdma0/
H A Dsdma0_4_1_sh_mask.h358 #define SDMA0_POWER_CNTL__MEM_POWER_LS_EN__SHIFT … macro
H A Dsdma0_4_0_sh_mask.h362 #define SDMA0_POWER_CNTL__MEM_POWER_LS_EN__SHIFT 0x9 macro
/dragonfly/sys/dev/drm/amd/include/asic_reg/oss/
H A Doss_3_0_1_sh_mask.h918 #define SDMA0_POWER_CNTL__MEM_POWER_LS_EN__SHIFT 0x9 macro
H A Doss_3_0_sh_mask.h1424 #define SDMA0_POWER_CNTL__MEM_POWER_LS_EN__SHIFT 0x9 macro