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Searched refs:SDMA0_POWER_CNTL__PG_CNTL_ENABLE_MASK (Results 1 – 3 of 3) sorted by relevance

/dragonfly/sys/dev/drm/amd/include/asic_reg/sdma0/
H A Dsdma0_4_1_sh_mask.h363 #define SDMA0_POWER_CNTL__PG_CNTL_ENABLE_MASK … macro
H A Dsdma0_4_0_sh_mask.h366 #define SDMA0_POWER_CNTL__PG_CNTL_ENABLE_MASK 0x00000001L macro
/dragonfly/sys/dev/drm/amd/amdgpu/
H A Dsdma_v4_0.c779 data |= SDMA0_POWER_CNTL__PG_CNTL_ENABLE_MASK; in sdma_v4_1_init_power_gating()