Home
last modified time | relevance | path

Searched refs:SDMA0_PUB_REG_TYPE0__SDMA0_UCODE_ADDR__SHIFT (Results 1 – 4 of 4) sorted by relevance

/dragonfly/sys/dev/drm/amd/include/asic_reg/sdma0/
H A Dsdma0_4_1_sh_mask.h157 #define SDMA0_PUB_REG_TYPE0__SDMA0_UCODE_ADDR__SHIFT macro
H A Dsdma0_4_0_sh_mask.h160 #define SDMA0_PUB_REG_TYPE0__SDMA0_UCODE_ADDR__SHIFT 0x0 macro
/dragonfly/sys/dev/drm/amd/include/asic_reg/oss/
H A Doss_3_0_1_sh_mask.h1490 #define SDMA0_PUB_REG_TYPE0__SDMA0_UCODE_ADDR__SHIFT 0x0 macro
H A Doss_3_0_sh_mask.h1818 #define SDMA0_PUB_REG_TYPE0__SDMA0_UCODE_ADDR__SHIFT 0x0 macro