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Searched refs:SDMA0_RLC1_RB_CNTL__RPTR_WRITEBACK_TIMER_MASK (Results 1 – 6 of 6) sorted by relevance

/dragonfly/sys/dev/drm/amd/include/asic_reg/sdma0/
H A Dsdma0_4_1_sh_mask.h1485 #define SDMA0_RLC1_RB_CNTL__RPTR_WRITEBACK_TIMER_MASK macro
H A Dsdma0_4_0_sh_mask.h1679 #define SDMA0_RLC1_RB_CNTL__RPTR_WRITEBACK_TIMER_MASK 0x001F0000L macro
/dragonfly/sys/dev/drm/amd/include/asic_reg/oss/
H A Doss_2_0_sh_mask.h1265 #define SDMA0_RLC1_RB_CNTL__RPTR_WRITEBACK_TIMER_MASK 0x1f0000 macro
H A Doss_2_4_sh_mask.h1401 #define SDMA0_RLC1_RB_CNTL__RPTR_WRITEBACK_TIMER_MASK 0x1f0000 macro
H A Doss_3_0_1_sh_mask.h1877 #define SDMA0_RLC1_RB_CNTL__RPTR_WRITEBACK_TIMER_MASK 0x1f0000 macro
H A Doss_3_0_sh_mask.h2187 #define SDMA0_RLC1_RB_CNTL__RPTR_WRITEBACK_TIMER_MASK 0x1f0000 macro