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Searched refs:SDMA0_SEM_WAIT_FAIL_TIMER_CNTL__TIMER__SHIFT (Results 1 – 6 of 6) sorted by relevance

/dragonfly/sys/dev/drm/amd/include/asic_reg/sdma0/
H A Dsdma0_4_1_sh_mask.h472 #define SDMA0_SEM_WAIT_FAIL_TIMER_CNTL__TIMER__SHIFT … macro
H A Dsdma0_4_0_sh_mask.h473 #define SDMA0_SEM_WAIT_FAIL_TIMER_CNTL__TIMER__SHIFT 0x0 macro
/dragonfly/sys/dev/drm/amd/include/asic_reg/oss/
H A Doss_2_0_sh_mask.h902 #define SDMA0_SEM_WAIT_FAIL_TIMER_CNTL__TIMER__SHIFT 0x0 macro
H A Doss_2_4_sh_mask.h982 #define SDMA0_SEM_WAIT_FAIL_TIMER_CNTL__TIMER__SHIFT 0x0 macro
H A Doss_3_0_1_sh_mask.h1000 #define SDMA0_SEM_WAIT_FAIL_TIMER_CNTL__TIMER__SHIFT 0x0 macro
H A Doss_3_0_sh_mask.h1506 #define SDMA0_SEM_WAIT_FAIL_TIMER_CNTL__TIMER__SHIFT 0x0 macro