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Searched refs:SDMA0_STATUS1_REG__CE_DST_IDLE__SHIFT (Results 1 – 6 of 6) sorted by relevance

/dragonfly/sys/dev/drm/amd/include/asic_reg/sdma0/
H A Dsdma0_4_1_sh_mask.h549 #define SDMA0_STATUS1_REG__CE_DST_IDLE__SHIFT … macro
H A Dsdma0_4_0_sh_mask.h550 #define SDMA0_STATUS1_REG__CE_DST_IDLE__SHIFT 0x6 macro
/dragonfly/sys/dev/drm/amd/include/asic_reg/oss/
H A Doss_2_0_sh_mask.h976 #define SDMA0_STATUS1_REG__CE_DST_IDLE__SHIFT 0x6 macro
H A Doss_2_4_sh_mask.h1060 #define SDMA0_STATUS1_REG__CE_DST_IDLE__SHIFT 0x6 macro
H A Doss_3_0_1_sh_mask.h1078 #define SDMA0_STATUS1_REG__CE_DST_IDLE__SHIFT 0x6 macro
H A Doss_3_0_sh_mask.h1584 #define SDMA0_STATUS1_REG__CE_DST_IDLE__SHIFT 0x6 macro