Home
last modified time | relevance | path

Searched refs:SDMA0_STATUS1_REG__CE_RREQ_IDLE_MASK (Results 1 – 6 of 6) sorted by relevance

/dragonfly/sys/dev/drm/amd/include/asic_reg/sdma0/
H A Dsdma0_4_1_sh_mask.h560 #define SDMA0_STATUS1_REG__CE_RREQ_IDLE_MASK … macro
H A Dsdma0_4_0_sh_mask.h561 #define SDMA0_STATUS1_REG__CE_RREQ_IDLE_MASK 0x00000008L macro
/dragonfly/sys/dev/drm/amd/include/asic_reg/oss/
H A Doss_2_0_sh_mask.h969 #define SDMA0_STATUS1_REG__CE_RREQ_IDLE_MASK 0x8 macro
H A Doss_2_4_sh_mask.h1053 #define SDMA0_STATUS1_REG__CE_RREQ_IDLE_MASK 0x8 macro
H A Doss_3_0_1_sh_mask.h1071 #define SDMA0_STATUS1_REG__CE_RREQ_IDLE_MASK 0x8 macro
H A Doss_3_0_sh_mask.h1577 #define SDMA0_STATUS1_REG__CE_RREQ_IDLE_MASK 0x8 macro