Home
last modified time | relevance | path

Searched refs:SRBM_GFX_CNTL (Results 1 – 6 of 6) sorted by relevance

/dragonfly/sys/dev/drm/amd/amdgpu/
H A Dvi.c362 srbm_gfx_cntl = REG_SET_FIELD(srbm_gfx_cntl, SRBM_GFX_CNTL, PIPEID, pipe); in vi_srbm_select()
363 srbm_gfx_cntl = REG_SET_FIELD(srbm_gfx_cntl, SRBM_GFX_CNTL, MEID, me); in vi_srbm_select()
364 srbm_gfx_cntl = REG_SET_FIELD(srbm_gfx_cntl, SRBM_GFX_CNTL, VMID, vmid); in vi_srbm_select()
365 srbm_gfx_cntl = REG_SET_FIELD(srbm_gfx_cntl, SRBM_GFX_CNTL, QUEUEID, queue); in vi_srbm_select()
/dragonfly/sys/dev/drm/radeon/
H A Dcik_sdma.c961 radeon_ring_write(ring, SRBM_GFX_CNTL >> 2); in cik_dma_vm_flush()
981 radeon_ring_write(ring, SRBM_GFX_CNTL >> 2); in cik_dma_vm_flush()
H A Dnid.h59 #define SRBM_GFX_CNTL 0x0E44 macro
H A Dcikd.h444 #define SRBM_GFX_CNTL 0xE44 macro
H A Dni.c1404 WREG32(SRBM_GFX_CNTL, RINGID(ring)); in cayman_cp_int_cntl_setup()
H A Dcik.c1846 WREG32(SRBM_GFX_CNTL, srbm_gfx_cntl); in cik_srbm_select()
5735 radeon_ring_write(ring, SRBM_GFX_CNTL >> 2); in cik_vm_flush()
5753 radeon_ring_write(ring, SRBM_GFX_CNTL >> 2); in cik_vm_flush()