Searched refs:TTM_PL_TT (Results 1 – 14 of 14) sorted by relevance
41 #define TTM_PL_TT 1 macro46 #define TTM_PL_FLAG_TT (1 << TTM_PL_TT)
141 case TTM_PL_TT: in radeon_init_mem_type()227 case TTM_PL_TT: in radeon_evict_flags()276 case TTM_PL_TT: in radeon_move_blit()287 case TTM_PL_TT: in radeon_move_blit()421 if ((old_mem->mem_type == TTM_PL_TT && in radeon_bo_move()424 new_mem->mem_type == TTM_PL_TT)) { in radeon_bo_move()477 case TTM_PL_TT: in radeon_ttm_io_mem_reserve()951 r = ttm_bo_init_mm(&rdev->mman.bdev, TTM_PL_TT, in radeon_ttm_init()984 ttm_bo_clean_mm(&rdev->mman.bdev, TTM_PL_TT); in radeon_ttm_fini()1072 static int ttm_pl_tt = TTM_PL_TT;
45 case TTM_PL_TT: in radeon_mem_type_to_domain()
54 case TTM_PL_TT: in radeon_update_memory_usage()
953 if (mem->mem_type == TTM_PL_TT) { in radeon_vm_bo_update()
191 case TTM_PL_TT: in amdgpu_init_mem_type()286 case TTM_PL_TT: in amdgpu_evict_flags()439 if (src->mem->mem_type == TTM_PL_TT && in amdgpu_ttm_copy_mem_to_mem()453 if (dst->mem->mem_type == TTM_PL_TT && in amdgpu_ttm_copy_mem_to_mem()675 if ((old_mem->mem_type == TTM_PL_TT && in amdgpu_bo_move()678 new_mem->mem_type == TTM_PL_TT)) { in amdgpu_bo_move()742 case TTM_PL_TT: in amdgpu_ttm_io_mem_reserve()1102 if (bo->mem.mem_type != TTM_PL_TT || in amdgpu_ttm_alloc_gart()1461 if (mem && mem->mem_type == TTM_PL_TT) { in amdgpu_ttm_tt_pte_flags()1510 case TTM_PL_TT: in amdgpu_ttm_bo_eviction_valuable()[all …]
126 case TTM_PL_TT: in amdgpu_mem_type_to_domain()203 case TTM_PL_TT: return amdgpu_gtt_mgr_has_gart_addr(&bo->tbo.mem); in amdgpu_bo_gpu_accessible()
467 ui64 = amdgpu_gtt_mgr_usage(&adev->mman.bdev.man[TTM_PL_TT]); in amdgpu_info_ioctl()490 vram_gtt.gtt_size = adev->mman.bdev.man[TTM_PL_TT].size; in amdgpu_info_ioctl()516 mem.gtt.total_heap_size = adev->mman.bdev.man[TTM_PL_TT].size; in amdgpu_info_ioctl()521 amdgpu_gtt_mgr_usage(&adev->mman.bdev.man[TTM_PL_TT]); in amdgpu_info_ioctl()
87 } else if (bo->tbo.mem.mem_type == TTM_PL_TT) { in amdgpu_bo_subtract_pin_size()401 man = &adev->mman.bdev.man[TTM_PL_TT]; in amdgpu_bo_validate_size()1371 WARN_ON_ONCE(bo->tbo.mem.mem_type == TTM_PL_TT && in amdgpu_bo_gpu_offset()
171 if ((&tbo->mem == mem || tbo->mem.mem_type != TTM_PL_TT) && in amdgpu_gtt_mgr_new()
924 seq_printf(m, "(%d)\n", ttm_bo_evict_mm(&adev->mman.bdev, TTM_PL_TT)); in amdgpu_debugfs_evict_gtt()
3270 &adev->mman.bdev.man[TTM_PL_TT]); in amdgpu_device_reset()3328 amdgpu_gtt_mgr_recover(&adev->mman.bdev.man[TTM_PL_TT]); in amdgpu_device_reset_sriov()
1735 if (mem->mem_type == TTM_PL_TT) { in amdgpu_vm_bo_update()
390 case TTM_PL_TT: in ttm_bo_vm_access()