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Searched refs:UNIPHY_PLL_CONTROL1__UNIPHY_PLL_LF_CNTL__SHIFT (Results 1 – 4 of 4) sorted by relevance

/dragonfly/sys/dev/drm/amd/include/asic_reg/dce/
H A Ddce_6_0_sh_mask.h9202 #define UNIPHY_PLL_CONTROL1__UNIPHY_PLL_LF_CNTL__SHIFT 0x00000008 macro
H A Ddce_8_0_sh_mask.h4420 #define UNIPHY_PLL_CONTROL1__UNIPHY_PLL_LF_CNTL__SHIFT 0x8 macro
H A Ddce_10_0_sh_mask.h11976 #define UNIPHY_PLL_CONTROL1__UNIPHY_PLL_LF_CNTL__SHIFT 0x8 macro
H A Ddce_11_0_sh_mask.h11788 #define UNIPHY_PLL_CONTROL1__UNIPHY_PLL_LF_CNTL__SHIFT 0x8 macro