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Searched refs:UPLL_RESET_MASK (Results 1 – 8 of 8) sorted by relevance

/dragonfly/sys/dev/drm/radeon/
H A Drv770.c78 WREG32_P(CG_UPLL_FUNC_CNTL, 0, ~(UPLL_RESET_MASK | UPLL_SLEEP_MASK)); in rv770_set_uvd_clocks()
89 WREG32_P(CG_UPLL_FUNC_CNTL, UPLL_RESET_MASK, ~UPLL_RESET_MASK); in rv770_set_uvd_clocks()
107 WREG32_P(CG_UPLL_FUNC_CNTL, 0, ~UPLL_RESET_MASK); in rv770_set_uvd_clocks()
H A Drv770d.h43 # define UPLL_RESET_MASK 0x00000001 macro
H A Dr600.c205 UPLL_RESET_MASK | UPLL_SLEEP_MASK | UPLL_CTLREQ_MASK)); in r600_set_uvd_clocks()
238 WREG32_P(CG_UPLL_FUNC_CNTL, UPLL_RESET_MASK, ~UPLL_RESET_MASK); in r600_set_uvd_clocks()
262 WREG32_P(CG_UPLL_FUNC_CNTL, 0, ~UPLL_RESET_MASK); in r600_set_uvd_clocks()
H A Devergreen.c1208 WREG32_P(CG_UPLL_FUNC_CNTL, 0, ~UPLL_RESET_MASK); in evergreen_set_uvd_clocks()
1217 WREG32_P(CG_UPLL_FUNC_CNTL, UPLL_RESET_MASK, ~UPLL_RESET_MASK); in evergreen_set_uvd_clocks()
1242 WREG32_P(CG_UPLL_FUNC_CNTL, 0, ~UPLL_RESET_MASK); in evergreen_set_uvd_clocks()
H A Dsid.h128 # define UPLL_RESET_MASK 0x00000001 macro
H A Dsi.c7026 WREG32_P(CG_UPLL_FUNC_CNTL, 0, ~UPLL_RESET_MASK); in si_set_uvd_clocks()
7035 WREG32_P(CG_UPLL_FUNC_CNTL, UPLL_RESET_MASK, ~UPLL_RESET_MASK); in si_set_uvd_clocks()
7060 WREG32_P(CG_UPLL_FUNC_CNTL, 0, ~UPLL_RESET_MASK); in si_set_uvd_clocks()
H A Devergreend.h349 # define UPLL_RESET_MASK 0x00000001 macro
H A Dr600d.h1557 # define UPLL_RESET_MASK 0x00000001 macro