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Searched refs:UVD_SUVD_CGC_CTRL__SCM_MODE_MASK (Results 1 – 8 of 8) sorted by relevance

/dragonfly/sys/dev/drm/amd/include/asic_reg/uvd/
H A Duvd_7_0_sh_mask.h258 #define UVD_SUVD_CGC_CTRL__SCM_MODE_MASK … macro
H A Duvd_5_0_sh_mask.h791 #define UVD_SUVD_CGC_CTRL__SCM_MODE_MASK 0x8 macro
H A Duvd_6_0_sh_mask.h785 #define UVD_SUVD_CGC_CTRL__SCM_MODE_MASK 0x8 macro
/dragonfly/sys/dev/drm/amd/include/asic_reg/vcn/
H A Dvcn_1_0_sh_mask.h525 #define UVD_SUVD_CGC_CTRL__SCM_MODE_MASK … macro
/dragonfly/sys/dev/drm/amd/amdgpu/
H A Duvd_v5_0.c697 UVD_SUVD_CGC_CTRL__SCM_MODE_MASK | in uvd_v5_0_set_sw_clock_gating()
H A Dvcn_v1_0.c440 | UVD_SUVD_CGC_CTRL__SCM_MODE_MASK in vcn_v1_0_disable_clock_gating()
513 | UVD_SUVD_CGC_CTRL__SCM_MODE_MASK in vcn_v1_0_enable_clock_gating()
H A Duvd_v6_0.c1359 UVD_SUVD_CGC_CTRL__SCM_MODE_MASK | in uvd_v6_0_set_sw_clock_gating()
H A Duvd_v7_0.c1629 UVD_SUVD_CGC_CTRL__SCM_MODE_MASK |