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Searched refs:VCLK_SRC_SEL (Results 1 – 8 of 8) sorted by relevance

/dragonfly/sys/dev/drm/radeon/
H A Drv770.c55 VCLK_SRC_SEL(1) | DCLK_SRC_SEL(1), in rv770_set_uvd_clocks()
121 VCLK_SRC_SEL(2) | DCLK_SRC_SEL(2), in rv770_set_uvd_clocks()
H A Drv770d.h57 # define VCLK_SRC_SEL(x) ((x) << 20) macro
H A Dsid.h141 # define VCLK_SRC_SEL(x) ((x) << 20) macro
H A Devergreend.h362 # define VCLK_SRC_SEL(x) ((x) << 20) macro
H A Dr600d.h1576 # define VCLK_SRC_SEL(x) ((x) << 20) macro
H A Dr600.c200 VCLK_SRC_SEL(1) | DCLK_SRC_SEL(1), in r600_set_uvd_clocks()
278 VCLK_SRC_SEL(2) | DCLK_SRC_SEL(2), in r600_set_uvd_clocks()
H A Devergreen.c1182 VCLK_SRC_SEL(1) | DCLK_SRC_SEL(1), in evergreen_set_uvd_clocks()
1255 VCLK_SRC_SEL(2) | DCLK_SRC_SEL(2), in evergreen_set_uvd_clocks()
H A Dsi.c6999 VCLK_SRC_SEL(1) | DCLK_SRC_SEL(1), in si_set_uvd_clocks()
7073 VCLK_SRC_SEL(2) | DCLK_SRC_SEL(2), in si_set_uvd_clocks()