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Searched refs:WARN (Results 1 – 25 of 72) sorted by relevance

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/dragonfly/contrib/lvm2/dist/scripts/
H A Dlvm2_monitoring_init_rhel428 WARN=1
48 if test "$WARN" = "1"; then
70 WARN=0
76 test "$runlevel" = "0" && WARN=0
77 test "$runlevel" = "6" && WARN=0
83 WARN=0
H A Dlvm2_monitoring_init_red_hat44 WARN=1
64 if test "$WARN" = "1"; then
87 WARN=0
94 test "$runlevel" = "0" && WARN=0
95 test "$runlevel" = "6" && WARN=0
102 WARN=0
H A Dlvm2_monitoring_init_red_hat.in44 WARN=1
64 if test "$WARN" = "1"; then
87 WARN=0
94 test "$runlevel" = "0" && WARN=0
95 test "$runlevel" = "6" && WARN=0
102 WARN=0
/dragonfly/usr.sbin/cpucontrol/
H A Dvia.c64 WARN(0, "ioctl()"); in via_probe()
109 WARN(0, "could not open %s for writing", dev); in via_update()
114 WARN(0, "ioctl(%s)", dev); in via_update()
120 WARN(0, "ioctl(%s)", dev); in via_update()
130 WARN(0, "ioctl(%s)", dev); in via_update()
142 WARN(0, "open(%s)", path); in via_update()
147 WARN(0, "fstat(%s)", path); in via_update()
161 WARN(0, "mmap(%s)", path); in via_update()
212 WARN(0, "ioctl()"); in via_update()
H A Dintel.c66 WARN(0, "ioctl()"); in intel_probe()
115 WARN(0, "could not open %s for writing", dev); in intel_update()
120 WARN(0, "ioctl(%s)", dev); in intel_update()
126 WARN(0, "ioctl(%s)", dev); in intel_update()
137 WARN(0, "ioctl(%s)", dev); in intel_update()
149 WARN(0, "open(%s)", path); in intel_update()
154 WARN(0, "fstat(%s)", path); in intel_update()
168 WARN(0, "mmap(%s)", path); in intel_update()
276 WARN(0, "ioctl()"); in intel_update()
H A Damd10h.c62 WARN(0, "ioctl()"); in amd10h_probe()
75 WARN(0, "ioctl()"); in amd10h_probe()
121 WARN(0, "could not open %s for writing", dev); in amd10h_update()
127 WARN(0, "ioctl()"); in amd10h_update()
135 WARN(0, "ioctl(%s)", dev); in amd10h_update()
152 WARN(0, "open(%s)", path); in amd10h_update()
157 WARN(0, "fstat(%s)", path); in amd10h_update()
173 WARN(0, "mmap(%s)", path); in amd10h_update()
292 WARN(0, "ioctl(%s)", dev); in amd10h_update()
H A Dcpucontrol.c126 WARN(0, "stat(%s)", path); in isdir()
156 WARN(0, "error opening %s for reading", dev); in do_cpuid()
161 WARN(0, "ioctl(%s, CPUCTL_CPUID)", dev); in do_cpuid()
206 WARN(0, "error opening %s for reading", dev); in do_cpuid_count()
211 WARN(0, "ioctl(%s, CPUCTL_CPUID_COUNT)", dev); in do_cpuid_count()
320 WARN(0, "error opening %s for %s", dev, in do_msr()
326 WARN(0, "ioctl(%s, CPUCTL_%s (%lu))", dev, command_name, command); in do_msr()
346 WARN(0, "error opening %s for writing", dev); in do_eval_cpu_features()
354 WARN(0, "ioctl(%s, CPUCTL_EVAL_CPU_FEATURES)", dev); in do_eval_cpu_features()
374 WARN(0, "error opening %s for reading", dev); in do_update()
[all …]
H A Damd.c63 WARN(0, "ioctl()"); in amd_probe()
100 WARN(0, "could not open %s for writing", dev); in amd_update()
105 WARN(0, "ioctl()"); in amd_update()
120 WARN(0, "open(%s)", path); in amd_update()
125 WARN(0, "fstat(%s)", path); in amd_update()
138 WARN(0, "mmap(%s)", path); in amd_update()
H A Dcpucontrol.h44 # define WARN(level, ...) \ macro
53 # define WARN(level, ...) \ macro
/dragonfly/sys/dev/drm/include/asm/
H A Dbug.h51 #ifndef WARN
52 #define WARN(condition, format...) ({ \ macro
76 WARN(condition, format); \
/dragonfly/sys/dev/drm/i915/
H A Di915_utils.h35 WARN(__i915_warn_cond, "WARN_ON(" #x ")"); })
37 #define WARN_ON(x) WARN((x), "%s", "WARN_ON(" __stringify(x) ")")
43 #define MISSING_CASE(x) WARN(1, "Missing switch case (%lu) in %s\n", \
H A Dintel_ddi.c793 WARN(1, "ddi translation table missing\n"); in intel_ddi_hdmi_level()
1086 WARN(1, "%d encoders on crtc for pipe %c\n", num_encoders, in intel_ddi_get_crtc_encoder()
1115 WARN(num_encoders != 1, "%d encoders on crtc for pipe %c\n", num_encoders, in intel_ddi_get_crtc_new_encoder()
1146 WARN(1, "bad wrpll refclk\n"); in hsw_ddi_calc_wrpll_link()
1344 WARN(1, "Unsupported link rate\n"); in cnl_ddi_clock_get()
1393 WARN(1, "Unsupported link rate\n"); in skl_ddi_clock_get()
1437 WARN(1, "bad spll freq\n"); in hsw_ddi_clock_get()
1442 WARN(1, "bad port clock sel\n"); in hsw_ddi_clock_get()
1635 WARN(1, "Invalid encoder type %d for pipe %c\n", in intel_ddi_enable_transcoder_func()
2078 WARN(1, "Unsupported voltage swing/pre-emphasis level: 0x%x\n", in translate_signal_level()
[all …]
H A Dintel_hdmi.c57 WARN(I915_READ(intel_hdmi->hdmi_reg) & enabled_bits, in assert_hdmi_port_disabled()
152 WARN(!(val & VIDEO_DIP_ENABLE), "Writing DIP with CTL reg disabled\n"); in g4x_write_infoframe()
209 WARN(!(val & VIDEO_DIP_ENABLE), "Writing DIP with CTL reg disabled\n"); in ibx_write_infoframe()
269 WARN(!(val & VIDEO_DIP_ENABLE), "Writing DIP with CTL reg disabled\n"); in cpt_write_infoframe()
327 WARN(!(val & VIDEO_DIP_ENABLE), "Writing DIP with CTL reg disabled\n"); in vlv_write_infoframe()
709 WARN(val & VIDEO_DIP_ENABLE, in ibx_set_infoframes()
805 WARN(val & VIDEO_DIP_ENABLE, in vlv_set_infoframes()
2020 if (WARN(intel_dig_port->max_lanes < 4, in intel_hdmi_init_connector()
H A Dintel_cdclk.c651 if (WARN((I915_READ(LCPLL_CTL) & in bdw_set_cdclk()
701 WARN(1, "invalid cdclk frequency\n"); in bdw_set_cdclk()
723 WARN(cdclk != dev_priv->cdclk.hw.cdclk, in bdw_set_cdclk()
1203 WARN(IS_GEMINILAKE(dev_priv), "Unsupported divider\n"); in bxt_get_cdclk()
1273 WARN(IS_GEMINILAKE(dev_priv), "Unsupported divider\n"); in bxt_set_cdclk()
2296 WARN(!IS_I830(dev_priv), in intel_init_cdclk_hooks()
H A Dintel_uc.c43 WARN(!(guc_status & GS_MIA_IN_RESET), in __intel_uc_reset_hw()
H A Dintel_uncore.c635 WARN(dev_priv->uncore.fw_domains_active, in assert_forcewakes_inactive()
649 WARN(fw_domains & ~dev_priv->uncore.fw_domains_active, in assert_forcewakes_active()
709 WARN(entry->domains & ~dev_priv->uncore.fw_domains, in find_fw_domain()
863 if (WARN(check_for_unclaimed_mmio(dev_priv) && !before, in __unclaimed_reg_debug()
H A Dintel_sideband.c192 WARN(val == 0xffffffff, "DPIO read pipe %c reg 0x%x == 0x%x\n", in vlv_dpio_read()
/dragonfly/sys/dev/drm/amd/amdgpu/
H A Damdgpu_gart.c230 WARN(1, "trying to unbind memory from uninitialized GART !\n"); in amdgpu_gart_unbind()
275 WARN(1, "trying to bind memory to uninitialized GART !\n"); in amdgpu_gart_map()
314 WARN(1, "trying to bind memory to uninitialized GART !\n"); in amdgpu_gart_bind()
H A Damdgpu_sched.c48 WARN(1, "Invalid context priority %d\n", amdgpu_priority); in amdgpu_to_sched_priority()
H A Damdgpu_cgs.c80 WARN(1, "Invalid indirect register space"); in amdgpu_cgs_read_ind_register()
108 WARN(1, "Invalid indirect register space"); in amdgpu_cgs_write_ind_register()
/dragonfly/sys/dev/drm/radeon/
H A Dradeon_gart.c249 WARN(1, "trying to unbind memory from uninitialized GART !\n"); in radeon_gart_unbind()
296 WARN(1, "trying to bind memory to uninitialized GART !\n"); in radeon_gart_bind()
/dragonfly/sys/dev/drm/
H A Ddrm_edid_load.c132 WARN(1, "Loading EDID firmware with extensions is untested!\n"); in do_edid_fw_load()
/dragonfly/sys/dev/drm/i915/gvt/
H A Dmpt.h133 if (WARN(control & GENMASK(15, 1), "only support one MSI format\n")) in intel_gvt_hypervisor_inject_msi()
/dragonfly/contrib/binutils-2.34/bfd/
H A Dlinker.c1290 WARN, /* Warn if referenced, else MWARN. */ enumerator
1308 /* WARN_ROW */ {MWARN, WARN, WARN, WARN, WARN, WARN, WARN, NOACT },
1760 case WARN: in _bfd_generic_link_add_one_symbol()
/dragonfly/contrib/binutils-2.27/bfd/
H A Dlinker.c1345 WARN, /* Warn if referenced, else MWARN. */ enumerator
1363 /* WARN_ROW */ {MWARN, WARN, WARN, WARN, WARN, WARN, WARN, NOACT },
1806 case WARN: in _bfd_generic_link_add_one_symbol()

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