| /dragonfly/sys/dev/drm/amd/amdgpu/ |
| H A D | soc15.c | 518 if (amdgpu_sriov_vf(adev)) in soc15_set_ip_blocks()
530 if (!amdgpu_sriov_vf(adev)) in soc15_set_ip_blocks()
533 if (adev->enable_virtual_display || amdgpu_sriov_vf(adev)) in soc15_set_ip_blocks()
552 if (adev->enable_virtual_display || amdgpu_sriov_vf(adev)) in soc15_set_ip_blocks()
738 if (amdgpu_sriov_vf(adev)) { in soc15_common_early_init()
750 if (amdgpu_sriov_vf(adev)) in soc15_common_late_init()
760 if (amdgpu_sriov_vf(adev)) in soc15_common_sw_init()
793 if (amdgpu_sriov_vf(adev)) in soc15_common_hw_fini()
910 if (amdgpu_sriov_vf(adev)) in soc15_common_set_clockgating_state()
957 if (amdgpu_sriov_vf(adev)) in soc15_common_get_clockgating_state()
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| H A D | vi.c | 276 if (amdgpu_sriov_vf(adev)) { in vi_init_golden_registers()
1181 if (amdgpu_sriov_vf(adev)) { in vi_common_early_init()
1193 if (amdgpu_sriov_vf(adev)) in vi_common_late_init()
1203 if (amdgpu_sriov_vf(adev)) in vi_common_sw_init()
1237 if (amdgpu_sriov_vf(adev)) in vi_common_hw_fini()
1488 if (amdgpu_sriov_vf(adev)) in vi_common_set_clockgating_state()
1536 if (amdgpu_sriov_vf(adev)) in vi_common_get_clockgating_state()
1592 if (amdgpu_sriov_vf(adev)) in vi_set_ip_blocks()
1612 if (adev->enable_virtual_display || amdgpu_sriov_vf(adev)) in vi_set_ip_blocks()
1622 if (!amdgpu_sriov_vf(adev)) { in vi_set_ip_blocks()
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| H A D | amdgpu_vf_error.c | 36 if (!amdgpu_sriov_vf(adev)) in amdgpu_vf_error_put()
57 if ((NULL == adev) || (!amdgpu_sriov_vf(adev)) || in amdgpu_vf_error_trans_all()
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| H A D | amdgpu_ib.c | 171 (amdgpu_sriov_vf(adev) && need_ctx_switch) || in amdgpu_ib_schedule()
217 !amdgpu_sriov_vf(adev)) /* for SRIOV preemption, Preamble CE ib must be inserted anyway */ in amdgpu_ib_schedule()
328 if (amdgpu_sriov_vf(adev)) { in amdgpu_ib_ring_tests()
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| H A D | amdgpu_psp.c | 236 if (amdgpu_sriov_vf(psp->adev)) in psp_asd_load()
262 if (!amdgpu_sriov_vf(adev) || !adev->in_gpu_reset) { in psp_hw_start()
301 if (amdgpu_sriov_vf(adev) && in psp_np_fw_load()
332 if (amdgpu_sriov_vf(adev) && adev->in_gpu_reset != 0) in psp_load_fw()
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| H A D | mmhub_v1_0.c | 386 if (amdgpu_sriov_vf(adev)) in mmhub_v1_0_initialize_power_gating()
452 if (amdgpu_sriov_vf(adev)) in mmhub_v1_0_update_power_gating()
499 if (amdgpu_sriov_vf(adev)) { in mmhub_v1_0_gart_enable()
732 if (amdgpu_sriov_vf(adev)) in mmhub_v1_0_set_clockgating()
760 if (amdgpu_sriov_vf(adev)) in mmhub_v1_0_get_clockgating()
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| H A D | amdgpu_device.c | 741 if (amdgpu_sriov_vf(adev)) in amdgpu_device_resize_fb_bar()
808 if (amdgpu_sriov_vf(adev)) in amdgpu_device_need_post()
1554 if (amdgpu_sriov_vf(adev)) { in amdgpu_device_ip_early_init()
1914 if (amdgpu_sriov_vf(adev)) in amdgpu_device_ip_fini()
1956 if (amdgpu_sriov_vf(adev)) in amdgpu_device_ip_suspend_phase1()
1983 if (amdgpu_sriov_vf(adev)) in amdgpu_device_ip_suspend_phase1()
2004 if (amdgpu_sriov_vf(adev)) in amdgpu_device_ip_suspend_phase2()
2043 if (amdgpu_sriov_vf(adev)) in amdgpu_device_ip_suspend_phase2()
2309 if (amdgpu_sriov_vf(adev)) in amdgpu_device_has_dc_support()
2971 if (amdgpu_sriov_vf(adev)) in amdgpu_device_ip_check_soft_reset()
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| H A D | gmc_v9_0.c | 256 if (!amdgpu_sriov_vf(adev)) { in gmc_v9_0_process_interrupt()
274 if (!amdgpu_sriov_vf(adev)) in gmc_v9_0_process_interrupt()
679 if (adev->asic_type == CHIP_VEGA10 && !amdgpu_sriov_vf(adev)) { in gmc_v9_0_late_init()
699 if (!amdgpu_sriov_vf(adev)) in gmc_v9_0_vram_gtt_location()
1136 if (amdgpu_sriov_vf(adev)) { in gmc_v9_0_hw_fini()
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| H A D | sdma_v4_0.c | 668 if (!amdgpu_sriov_vf(adev)) { /* only bare-metal use register write for wptr */ in sdma_v4_0_gfx_resume()
688 if (amdgpu_sriov_vf(adev)) in sdma_v4_0_gfx_resume()
699 if (!amdgpu_sriov_vf(adev)) { in sdma_v4_0_gfx_resume()
713 if (amdgpu_sriov_vf(adev)) in sdma_v4_0_gfx_resume()
733 if (amdgpu_sriov_vf(adev)) { /* bare-metal sequence doesn't need below to lines */ in sdma_v4_0_gfx_resume()
883 if (amdgpu_sriov_vf(adev)) { in sdma_v4_0_start()
1309 if (amdgpu_sriov_vf(adev)) in sdma_v4_0_hw_fini()
1549 if (amdgpu_sriov_vf(adev)) in sdma_v4_0_set_clockgating_state()
1590 if (amdgpu_sriov_vf(adev)) in sdma_v4_0_get_clockgating_state()
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| H A D | vce_v4_0.c | 407 if (amdgpu_sriov_vf(adev)) /* currently only VCN0 support SRIOV */ in vce_v4_0_early_init()
461 if (amdgpu_sriov_vf(adev)) { in vce_v4_0_sw_init()
515 if (amdgpu_sriov_vf(adev)) in vce_v4_0_hw_init()
543 if (!amdgpu_sriov_vf(adev)) { in vce_v4_0_hw_fini()
1012 if (!amdgpu_sriov_vf(adev)) { in vce_v4_0_set_interrupt_state()
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| H A D | uvd_v7_0.c | 182 if (amdgpu_sriov_vf(adev)) in uvd_v7_0_enc_ring_test_ring()
404 if (amdgpu_sriov_vf(adev)) in uvd_v7_0_early_init()
455 if (!amdgpu_sriov_vf(adev)) { in uvd_v7_0_sw_init()
466 if (amdgpu_sriov_vf(adev)) { in uvd_v7_0_sw_init()
532 if (amdgpu_sriov_vf(adev)) in uvd_v7_0_hw_init()
544 if (!amdgpu_sriov_vf(adev)) { in uvd_v7_0_hw_init()
614 if (!amdgpu_sriov_vf(adev)) in uvd_v7_0_hw_fini()
1570 if (!amdgpu_sriov_vf(adev)) in uvd_v7_0_process_interrupt()
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| H A D | amdgpu_virt.c | 340 if (!amdgpu_sriov_vf(adev) || adev->virt.mm_table.gpu_addr) in amdgpu_virt_alloc_mm_table()
367 if (!amdgpu_sriov_vf(adev) || !adev->virt.mm_table.gpu_addr) in amdgpu_virt_free_mm_table()
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| H A D | amdgpu_amdkfd.c | 386 if (amdgpu_sriov_vf(adev)) in get_local_mem_info()
409 if (amdgpu_sriov_vf(adev)) in get_max_engine_clock_in_mhz()
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| H A D | amdgpu_fence.c | 445 && !amdgpu_sriov_vf(ring->adev)) in amdgpu_fence_driver_init_ring()
730 if (amdgpu_sriov_vf(adev)) in amdgpu_debugfs_fence_init()
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| H A D | gmc_v8_0.c | 431 if (!amdgpu_sriov_vf(adev)) in gmc_v8_0_vram_gtt_location()
484 if (amdgpu_sriov_vf(adev)) { in gmc_v8_0_mc_program()
1458 if (amdgpu_sriov_vf(adev)) { in gmc_v8_0_process_interrupt()
1684 if (amdgpu_sriov_vf(adev)) in gmc_v8_0_set_clockgating_state()
1711 if (amdgpu_sriov_vf(adev)) in gmc_v8_0_get_clockgating_state()
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| H A D | amdgpu_ucode.c | 424 amdgpu_sriov_vf(adev) ? AMDGPU_GEM_DOMAIN_VRAM : AMDGPU_GEM_DOMAIN_GTT, in amdgpu_ucode_init_bo()
441 if (amdgpu_sriov_vf(adev)) in amdgpu_ucode_init_bo()
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| H A D | amdgpu_vce.c | 361 if (amdgpu_sriov_vf(adev)) in amdgpu_vce_ring_begin_use()
390 if (!amdgpu_sriov_vf(ring->adev)) in amdgpu_vce_ring_end_use()
1078 if (amdgpu_sriov_vf(adev)) in amdgpu_vce_ring_test_ring()
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| H A D | amdgpu_virt.h | 259 #define amdgpu_sriov_vf(adev) \ macro
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| H A D | amdgpu_kms.c | 59 if (amdgpu_sriov_vf(adev)) in amdgpu_driver_unload_kms()
599 if (amdgpu_sriov_vf(adev)) in amdgpu_info_ioctl()
885 if (amdgpu_sriov_vf(adev)) { in amdgpu_driver_open_kms()
948 if (amdgpu_sriov_vf(adev)) { in amdgpu_driver_postclose_kms()
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| H A D | sdma_v3_0.c | 1206 if (!amdgpu_sriov_vf(adev)) { in sdma_v3_0_sw_init()
1561 if (amdgpu_sriov_vf(adev)) in sdma_v3_0_set_clockgating_state()
1590 if (amdgpu_sriov_vf(adev)) in sdma_v3_0_get_clockgating_state()
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| H A D | amdgpu_irq.c | 108 if (!amdgpu_sriov_vf(adev)) in amdgpu_irq_reset_work_func()
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| H A D | gfxhub_v1_0.c | 253 if (amdgpu_sriov_vf(adev)) { in gfxhub_v1_0_gart_enable()
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| H A D | amdgpu_uvd.c | 1212 if (amdgpu_sriov_vf(adev)) in amdgpu_uvd_ring_begin_use()
1231 if (!amdgpu_sriov_vf(ring->adev)) in amdgpu_uvd_ring_end_use()
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| H A D | dce_virtual.c | 133 if (amdgpu_sriov_vf(adev)) in dce_virtual_crtc_dpms()
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| H A D | gfx_v9_0.c | 2284 if (amdgpu_sriov_vf(adev)) { in gfx_v9_0_rlc_resume()
3240 if (amdgpu_sriov_vf(adev)) { in gfx_v9_0_hw_fini()
3791 if (amdgpu_sriov_vf(adev)) in gfx_v9_0_set_clockgating_state()
3813 if (amdgpu_sriov_vf(adev)) in gfx_v9_0_get_clockgating_state()
3927 if (amdgpu_sriov_vf(ring->adev) && (ib->flags & AMDGPU_IB_FLAG_PREEMPT)) { in gfx_v9_0_ring_emit_ib_gfx()
4233 if (amdgpu_sriov_vf(ring->adev)) in gfx_v9_ring_emit_cntxcntl()
4339 if (amdgpu_sriov_vf(ring->adev)) in gfx_v9_0_ring_emit_reg_write_reg_wait()
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