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Searched refs:cur_link_settings (Results 1 – 8 of 8) sorted by relevance

/dragonfly/sys/dev/drm/amd/display/amdgpu_dm/
H A Damdgpu_dm_debugfs.c97 link->cur_link_settings.lane_count, in dp_link_settings_read()
98 link->cur_link_settings.link_rate, in dp_link_settings_read()
99 link->cur_link_settings.link_spread); in dp_link_settings_read()
395 link->cur_link_settings.lane_count; in dp_phy_settings_write()
397 link->cur_link_settings.link_rate; in dp_phy_settings_write()
399 link->cur_link_settings.link_spread; in dp_phy_settings_write()
503 struct dc_link_settings cur_link_settings = {LANE_COUNT_UNKNOWN, in dp_phy_test_pattern_debugfs_write() local
636 cur_link_settings.lane_count = link->cur_link_settings.lane_count; in dp_phy_test_pattern_debugfs_write()
637 cur_link_settings.link_rate = link->cur_link_settings.link_rate; in dp_phy_test_pattern_debugfs_write()
638 cur_link_settings.link_spread = link->cur_link_settings.link_spread; in dp_phy_test_pattern_debugfs_write()
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H A Damdgpu_dm_mst_types.c424 aconnector->dc_link->cur_link_settings.lane_count = 0; in dm_dp_destroy_mst_connector()
H A Damdgpu_dm.c1198 if ((dc_link->cur_link_settings.lane_count != LANE_COUNT_UNKNOWN) || in handle_hpd_rx_irq()
/dragonfly/sys/dev/drm/amd/display/dc/core/
H A Ddc_link_hwss.c159 memset(&link->cur_link_settings, 0, in dp_disable_link_phy()
160 sizeof(link->cur_link_settings)); in dp_disable_link_phy()
303 memset(&link->cur_link_settings, 0, in dp_retrain_link_dp_test()
304 sizeof(link->cur_link_settings)); in dp_retrain_link_dp_test()
319 link->cur_link_settings = *link_setting; in dp_retrain_link_dp_test()
H A Ddc_link_dp.c1590 if (link->cur_link_settings.lane_count == 0) in hpd_rx_irq_check_link_loss_status()
1596 for (lane = 0; lane < link->cur_link_settings.lane_count; lane++) { in hpd_rx_irq_check_link_loss_status()
1700 if ((link->cur_link_settings.lane_count != LANE_COUNT_UNKNOWN) || in allow_hpd_rx_irq()
1879 link_settings.link = link->cur_link_settings; in dp_test_send_phy_test_pattern()
1882 (unsigned int)(link->cur_link_settings.lane_count); in dp_test_send_phy_test_pattern()
2092 &link->cur_link_settings, in dc_link_handle_hpd_rx_irq()
H A Ddc_link.c1402 link->cur_link_settings = link_settings; in enable_link_dp()
1439 if (link->cur_link_settings.lane_count != LANE_COUNT_UNKNOWN) in enable_link_dp_mst()
1874 memset(&stream->sink->link->cur_link_settings, 0, in enable_link_hdmi()
2163 &stream->sink->link->cur_link_settings; in get_pbn_per_slot()
2477 &pipe_ctx->stream->sink->link->cur_link_settings); in core_link_enable_stream()
/dragonfly/sys/dev/drm/amd/display/dc/
H A Ddc_link.h83 struct dc_link_settings cur_link_settings; member
/dragonfly/sys/dev/drm/amd/display/dc/dce110/
H A Ddce110_hw_sequencer.c698 pipe_ctx->stream->sink->link->cur_link_settings.lane_count; in dce110_enable_stream()
2460 stream->sink->link->cur_link_settings.lane_count; in dce110_fill_display_configs()
2462 stream->sink->link->cur_link_settings.link_rate; in dce110_fill_display_configs()
2464 stream->sink->link->cur_link_settings.link_spread; in dce110_fill_display_configs()