Searched refs:dst_h (Results 1 – 8 of 8) sorted by relevance
/dragonfly/sys/dev/drm/ |
H A D | drm_rect.c | 163 int dst_h = drm_rect_height(dst); in drm_rect_calc_vscale() local 164 int vscale = drm_calc_scale(src_h, dst_h); in drm_rect_calc_vscale() 166 if (vscale < 0 || dst_h == 0) in drm_rect_calc_vscale() 250 int dst_h = drm_rect_height(dst); in drm_rect_calc_vscale_relaxed() local 251 int vscale = drm_calc_scale(src_h, dst_h); in drm_rect_calc_vscale_relaxed() 253 if (vscale < 0 || dst_h == 0) in drm_rect_calc_vscale_relaxed() 259 drm_rect_adjust_size(dst, 0, max_dst_h - dst_h); in drm_rect_calc_vscale_relaxed() 265 int max_src_h = dst_h * max_vscale; in drm_rect_calc_vscale_relaxed()
|
/dragonfly/sbin/routed/ |
H A D | output.c | 337 naddr mask, v1_mask, dst_h, ddst_h = 0; in supply_out() local 348 dst_h = ag->ag_dst_h; in supply_out() 350 v1_mask = ripv1_mask_host(htonl(dst_h), in supply_out() 386 addrname(htonl(dst_h), mask, in supply_out() 402 wb->n->n_dst = htonl(dst_h); in supply_out() 426 dst_h += ddst_h; in supply_out()
|
H A D | table.c | 194 naddr dst_h; in ag_flush() local 203 dst_h = ag->ag_dst_h; in ag_flush() 204 if ((dst_h & lim_mask) != lim_dst_h) in ag_flush() 221 if ((dst_h & ag_cors->ag_mask) == ag_cors->ag_dst_h) { in ag_flush() 246 if (ag_cors->ag_dst_h == dst_h) in ag_flush()
|
/dragonfly/sys/dev/drm/amd/amdgpu/ |
H A D | amdgpu_display.c | 673 u32 src_h = 1, dst_h = 1; in amdgpu_display_crtc_scaling_mode_fixup() local 700 dst_h = amdgpu_crtc->native_mode.hdisplay; in amdgpu_display_crtc_scaling_mode_fixup() 720 dst_h = crtc->mode.hdisplay - (amdgpu_crtc->h_border * 2); in amdgpu_display_crtc_scaling_mode_fixup() 729 b.full = dfixed_const(dst_h); in amdgpu_display_crtc_scaling_mode_fixup()
|
/dragonfly/sys/dev/drm/i915/ |
H A D | intel_overlay.c | 519 short dst_h; member 661 if (params->dst_h > 1) in update_scaling_factors() 663 /(params->dst_h); in update_scaling_factors() 843 iowrite32((params->dst_h << 16) | params->dst_w, ®s->DWINSZ); in intel_overlay_do_put_image() 984 tmp = ((rec->src_scan_h << 16) / rec->dst_h) >> 16; in check_overlay_scaling() 1194 params->dst_h = ((((u32)put_image_rec->dst_height) << 12) / in intel_overlay_put_image_ioctl() 1198 params->dst_h = put_image_rec->dst_height; in intel_overlay_put_image_ioctl()
|
H A D | intel_pm.c | 3853 uint32_t src_w, src_h, dst_w, dst_h; in skl_plane_downscale_amount() local 3869 dst_h = pstate->base.crtc_h; in skl_plane_downscale_amount() 3879 dst_h = drm_rect_height(&pstate->base.dst); in skl_plane_downscale_amount() 3883 fp_h_ratio = div_fixed16(src_h, dst_h); in skl_plane_downscale_amount() 3899 uint32_t src_w, src_h, dst_w, dst_h; in skl_pipe_downscale_amount() local 3907 dst_h = pfit_size & 0xffff; in skl_pipe_downscale_amount() 3909 if (!dst_w || !dst_h) in skl_pipe_downscale_amount() 3913 fp_h_ratio = div_fixed16(src_h, dst_h); in skl_pipe_downscale_amount()
|
H A D | intel_display.c | 4606 int src_w, int src_h, int dst_w, int dst_h) in skl_update_scaler() argument 4622 need_scaling = src_w != dst_w || src_h != dst_h; in skl_update_scaler() 4665 dst_w < SKL_MIN_DST_W || dst_h < SKL_MIN_DST_H || in skl_update_scaler() 4668 dst_w > SKL_MAX_DST_W || dst_h > SKL_MAX_DST_H) { in skl_update_scaler() 4671 intel_crtc->pipe, scaler_user, src_w, src_h, dst_w, dst_h); in skl_update_scaler() 4679 intel_crtc->pipe, scaler_user, src_w, src_h, dst_w, dst_h, in skl_update_scaler() 10256 int dst_h = drm_rect_height(&state->base.dst); in needs_scaling() local 10258 return (src_w != dst_w || src_h != dst_h); in needs_scaling()
|
/dragonfly/sys/dev/drm/radeon/ |
H A D | radeon_display.c | 1713 u32 src_h = 1, dst_h = 1; in radeon_crtc_scaling_mode_fixup() local 1741 dst_h = radeon_crtc->native_mode.hdisplay; in radeon_crtc_scaling_mode_fixup() 1762 dst_h = crtc->mode.hdisplay - (radeon_crtc->h_border * 2); in radeon_crtc_scaling_mode_fixup() 1784 b.full = dfixed_const(dst_h); in radeon_crtc_scaling_mode_fixup()
|