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Searched refs:fp0 (Results 1 – 14 of 14) sorted by relevance

/dragonfly/contrib/gcc-8.0/gcc/config/i386/
H A Dznver1.md69 (define_cpu_unit "znver1-fp0" "znver1_fp")
387 "znver1-double,znver1-fp0,znver1-fp2")
401 "znver1-direct,znver1-fp0*5")
457 "znver1-direct,znver1-fp0|znver1-fp3")
499 "znver1-direct,znver1-fp0*3")
566 "znver1-direct,znver1-fp0|znver1-fp1")
584 "znver1-double,znver1-fp0|znver1-fp1")
918 "znver1-direct,znver1-fp0*3")
925 "znver1-double,znver1-fp0*4")
946 "znver1-direct,znver1-fp0*3")
[all …]
H A Dbtver2.md83 (define_cpu_unit "btver2-fp0" "btver2_fp")
86 (define_reservation "btver2-fpa" "btver2-fp0")
87 (define_reservation "btver2-vimul" "btver2-fp0")
303 "btver2-direct,(btver2-fp0|btver2-fp1)")
309 "btver2-direct,btver2-load,btver2-fp0")
314 "btver2-direct,btver2-fp0")
352 "btver2-vector,(btver2-fp0|btver2-fp1)*7")
359 "btver2-direct,btver2-load,btver2-fp0*2")
365 "btver2-direct, btver2-fp0*2")
371 "btver2-direct,btver2-load,btver2-fp0")
[all …]
H A Dxmmintrin.h78 #define _MM_SHUFFLE(fp3,fp2,fp1,fp0) \ argument
79 (((fp3) << 6) | ((fp2) << 4) | ((fp1) << 2) | (fp0))
H A Demmintrin.h61 #define _MM_SHUFFLE2(fp1,fp0) \ argument
62 (((fp1) << 1) | (fp0))
/dragonfly/sys/dev/disk/mpt/
H A Dmpt.c3071 MPT_2_HOST32(fp0, Flags); in mpt2host_config_page_fc_port_0()
3072 MPT_2_HOST32(fp0, PortIdentifier); in mpt2host_config_page_fc_port_0()
3073 MPT_2_HOST32(fp0, WWNN.Low); in mpt2host_config_page_fc_port_0()
3074 MPT_2_HOST32(fp0, WWNN.High); in mpt2host_config_page_fc_port_0()
3075 MPT_2_HOST32(fp0, WWPN.Low); in mpt2host_config_page_fc_port_0()
3076 MPT_2_HOST32(fp0, WWPN.High); in mpt2host_config_page_fc_port_0()
3079 MPT_2_HOST32(fp0, CurrentSpeed); in mpt2host_config_page_fc_port_0()
3080 MPT_2_HOST32(fp0, MaxFrameSize); in mpt2host_config_page_fc_port_0()
3081 MPT_2_HOST32(fp0, FabricWWNN.Low); in mpt2host_config_page_fc_port_0()
3083 MPT_2_HOST32(fp0, FabricWWPN.Low); in mpt2host_config_page_fc_port_0()
[all …]
/dragonfly/sys/dev/drm/i915/
H A Dintel_dpll_mgr.h113 uint32_t fp0; member
H A Dintel_dpll_mgr.c351 hw_state->fp0 = I915_READ(PCH_FP0(pll->id)); in ibx_pch_dpll_get_hw_state()
362 I915_WRITE(PCH_FP0(pll->id), pll->state.hw_state.fp0); in ibx_pch_dpll_prepare()
455 hw_state->fp0, in ibx_dump_hw_state()
2530 hw_state->fp0, in intel_dpll_dump_hw_state()
H A Dintel_display.c5743 I915_WRITE(FP0(crtc->pipe), crtc->config->dpll_hw_state.fp0); in i9xx_set_pll_dividers()
6426 crtc_state->dpll_hw_state.fp0 = fp; in i9xx_update_pll_dividers()
7569 pipe_config->dpll_hw_state.fp0 = I915_READ(FP0(crtc->pipe)); in i9xx_get_pipe_config()
8245 crtc_state->dpll_hw_state.fp0 = fp; in ironlake_compute_dpll()
10054 fp = pipe_config->dpll_hw_state.fp0; in i9xx_crtc_clock_get()
11288 PIPE_CONF_CHECK_X(dpll_hw_state.fp0); in intel_pipe_config_compare()
/dragonfly/sys/bus/firewire/
H A Dfwohci.c2585 struct fw_pkt *fp0; local
2596 fp0 = (struct fw_pkt *)&ld0;
2598 switch (fp0->mode.common.tcode) {
2618 kprintf("Unknown tcode %d\n", fp0->mode.common.tcode);
2621 hlen = tinfo[fp0->mode.common.tcode].hdr_len;
/dragonfly/contrib/gcc-4.7/gcc/config/i386/
H A Dxmmintrin.h49 #define _MM_SHUFFLE(fp3,fp2,fp1,fp0) \ argument
50 (((fp3) << 6) | ((fp2) << 4) | ((fp1) << 2) | (fp0))
H A Demmintrin.h51 #define _MM_SHUFFLE2(fp1,fp0) \ argument
52 (((fp1) << 1) | (fp0))
/dragonfly/contrib/binutils-2.27/gas/doc/
H A Dc-i370.texi68 Registers can be given the symbolic names r0..r15, fp0, fp2, fp4, fp6.
H A Dc-sh64.texi115 vectors, @samp{fp0} through @samp{fp62} (even numbered registers only)
/dragonfly/contrib/gcc-4.7/gcc/doc/
H A Dmd.texi7204 fmoved sp@@+,fp0
7216 fmoved sp@@+,fp0