| /dragonfly/sys/dev/drm/amd/amdgpu/ |
| H A D | amdgpu_kms.c | 1124 fw_info.feature, fw_info.ver); in amdgpu_debugfs_firmware_info()
1132 fw_info.feature, fw_info.ver); in amdgpu_debugfs_firmware_info()
1140 fw_info.feature, fw_info.ver); in amdgpu_debugfs_firmware_info()
1148 fw_info.feature, fw_info.ver); in amdgpu_debugfs_firmware_info()
1156 fw_info.feature, fw_info.ver); in amdgpu_debugfs_firmware_info()
1164 fw_info.feature, fw_info.ver); in amdgpu_debugfs_firmware_info()
1172 fw_info.feature, fw_info.ver); in amdgpu_debugfs_firmware_info()
1180 fw_info.feature, fw_info.ver); in amdgpu_debugfs_firmware_info()
1188 fw_info.feature, fw_info.ver); in amdgpu_debugfs_firmware_info()
1196 fw_info.feature, fw_info.ver); in amdgpu_debugfs_firmware_info()
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| /dragonfly/sys/dev/drm/amd/powerplay/hwmgr/ |
| H A D | ppatomfwctrl.c | 517 struct atom_firmware_info_v3_2 *fw_info) in pp_atomfwctrl_copy_vbios_bootup_values_3_2() argument
521 boot_values->ulRevision = fw_info->firmware_revision; in pp_atomfwctrl_copy_vbios_bootup_values_3_2()
524 boot_values->usVddc = fw_info->bootup_vddc_mv; in pp_atomfwctrl_copy_vbios_bootup_values_3_2()
525 boot_values->usVddci = fw_info->bootup_vddci_mv; in pp_atomfwctrl_copy_vbios_bootup_values_3_2()
526 boot_values->usMvddc = fw_info->bootup_mvddc_mv; in pp_atomfwctrl_copy_vbios_bootup_values_3_2()
527 boot_values->usVddGfx = fw_info->bootup_vddgfx_mv; in pp_atomfwctrl_copy_vbios_bootup_values_3_2()
550 struct atom_firmware_info_v3_1 *fw_info) in pp_atomfwctrl_copy_vbios_bootup_values_3_1() argument
557 boot_values->usVddc = fw_info->bootup_vddc_mv; in pp_atomfwctrl_copy_vbios_bootup_values_3_1()
558 boot_values->usVddci = fw_info->bootup_vddci_mv; in pp_atomfwctrl_copy_vbios_bootup_values_3_1()
559 boot_values->usMvddc = fw_info->bootup_mvddc_mv; in pp_atomfwctrl_copy_vbios_bootup_values_3_1()
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| H A D | processpptables.c | 1017 const ATOM_FIRMWARE_INFO_V1_4 *fw_info) in init_overdrive_limits_V1_4() argument
1020 le32_to_cpu(fw_info->ulASICMaxEngineClock); in init_overdrive_limits_V1_4()
1023 le32_to_cpu(fw_info->ulASICMaxMemoryClock); in init_overdrive_limits_V1_4()
1029 le16_to_cpu(fw_info->usBootUpVDDCVoltage); in init_overdrive_limits_V1_4()
1032 le16_to_cpu(fw_info->usBootUpVDDCVoltage); in init_overdrive_limits_V1_4()
1040 const ATOM_FIRMWARE_INFO_V2_1 *fw_info) in init_overdrive_limits_V2_1() argument
1087 fw_info = smu_atom_get_data_table(hwmgr->adev, in init_overdrive_limits()
1091 if ((fw_info->ucTableFormatRevision == 1) in init_overdrive_limits()
1095 (const ATOM_FIRMWARE_INFO_V1_4 *)fw_info); in init_overdrive_limits()
1097 else if ((fw_info->ucTableFormatRevision == 2) in init_overdrive_limits()
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| H A D | ppatomctrl.c | 484 ATOM_FIRMWARE_INFO *fw_info; in atomctrl_get_reference_clock() local
489 fw_info = (ATOM_FIRMWARE_INFO *) in atomctrl_get_reference_clock()
494 if (fw_info == NULL) in atomctrl_get_reference_clock()
497 clock = (uint32_t)(le16_to_cpu(fw_info->usReferenceClock)); in atomctrl_get_reference_clock()
1167 ATOM_COMMON_TABLE_HEADER *fw_info; in atomctrl_get_mpll_reference_clock() local
1172 fw_info = (ATOM_COMMON_TABLE_HEADER *) in atomctrl_get_mpll_reference_clock()
1177 if (fw_info == NULL) in atomctrl_get_mpll_reference_clock()
1180 if ((fw_info->ucTableFormatRevision == 2) && in atomctrl_get_mpll_reference_clock()
1181 (le16_to_cpu(fw_info->usStructureSize) >= sizeof(ATOM_FIRMWARE_INFO_V2_1))) { in atomctrl_get_mpll_reference_clock()
1183 (ATOM_FIRMWARE_INFO_V2_1 *)fw_info; in atomctrl_get_mpll_reference_clock()
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| H A D | smu7_hwmgr.c | 3063 ATOM_FIRMWARE_INFO_V2_2 *fw_info; in smu7_dpm_patch_boot_state() local
3071 fw_info = (ATOM_FIRMWARE_INFO_V2_2 *)smu_atom_get_data_table(hwmgr->adev, index, in smu7_dpm_patch_boot_state()
3073 if (!fw_info) in smu7_dpm_patch_boot_state()
3079 le32_to_cpu(fw_info->ulDefaultEngineClock); in smu7_dpm_patch_boot_state()
3081 le32_to_cpu(fw_info->ulDefaultMemoryClock); in smu7_dpm_patch_boot_state()
3083 le16_to_cpu(fw_info->usBootUpMVDDCVoltage); in smu7_dpm_patch_boot_state()
3085 le16_to_cpu(fw_info->usBootUpVDDCVoltage); in smu7_dpm_patch_boot_state()
3087 le16_to_cpu(fw_info->usBootUpVDDCIVoltage); in smu7_dpm_patch_boot_state()
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| /dragonfly/sys/dev/drm/i915/ |
| H A D | intel_csr.c | 128 struct intel_fw_info fw_info[20]; member
339 if (package_header->fw_info[i].substepping == '*' && in parse_csr_fw()
340 si->stepping == package_header->fw_info[i].stepping) { in parse_csr_fw()
341 dmc_offset = package_header->fw_info[i].offset; in parse_csr_fw()
343 } else if (si->stepping == package_header->fw_info[i].stepping && in parse_csr_fw()
344 si->substepping == package_header->fw_info[i].substepping) { in parse_csr_fw()
345 dmc_offset = package_header->fw_info[i].offset; in parse_csr_fw()
347 } else if (package_header->fw_info[i].stepping == '*' && in parse_csr_fw()
348 package_header->fw_info[i].substepping == '*') in parse_csr_fw()
349 dmc_offset = package_header->fw_info[i].offset; in parse_csr_fw()
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| /dragonfly/sys/dev/drm/amd/display/dc/dce/ |
| H A D | dce_clock_source.c | 1194 struct dc_firmware_info fw_info = { { 0 } }; in calc_pll_max_vco_construct() local
1202 &fw_info) != BP_RESULT_OK) in calc_pll_max_vco_construct()
1206 calc_pll_cs->ref_freq_khz = fw_info.pll_info.crystal_frequency; in calc_pll_max_vco_construct()
1208 fw_info.pll_info.min_output_pxl_clk_pll_frequency; in calc_pll_max_vco_construct()
1210 fw_info.pll_info.max_output_pxl_clk_pll_frequency; in calc_pll_max_vco_construct()
1217 fw_info.pll_info.max_input_pxl_clk_pll_frequency; in calc_pll_max_vco_construct()
1224 fw_info.pll_info.min_input_pxl_clk_pll_frequency; in calc_pll_max_vco_construct()
1276 struct dc_firmware_info fw_info = { { 0 } }; in dce110_clk_src_construct() local
1290 clk_src->bios, &fw_info) != BP_RESULT_OK) { in dce110_clk_src_construct()
1296 fw_info.external_clock_source_frequency_for_dp; in dce110_clk_src_construct()
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| H A D | dce_clocks.c | 349 struct dc_firmware_info fw_info = { { 0 } }; in dce_clock_read_integrated_info() local
357 bp->funcs->get_firmware_info(bp, &fw_info); in dce_clock_read_integrated_info()
359 fw_info.smu_gpu_pll_output_freq; in dce_clock_read_integrated_info()
840 struct dc_firmware_info fw_info = { { 0 } }; in dcn1_dccg_create() local
860 bp->funcs->get_firmware_info(bp, &fw_info); in dcn1_dccg_create()
861 clk_dce->dentist_vco_freq_khz = fw_info.smu_gpu_pll_output_freq; in dcn1_dccg_create()
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| /dragonfly/sys/dev/netif/bce/ |
| H A D | if_bce.c | 358 struct fw_info *);
2663 struct fw_info *fw) in bce_load_cpu_fw()
2786 struct fw_info fw; in bce_init_rxp_cpu()
2878 struct fw_info fw; in bce_init_txp_cpu()
2970 struct fw_info fw; in bce_init_tpat_cpu()
3062 struct fw_info fw; in bce_init_cp_cpu()
3154 struct fw_info fw; in bce_init_com_cpu()
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| H A D | if_bcereg.h | 5734 struct fw_info { struct
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| /dragonfly/sys/dev/drm/amd/display/dc/core/ |
| H A D | dc_resource.c | 151 struct dc_firmware_info fw_info = { { 0 } }; in dc_create_resource_pool() local
154 dc->ctx->dc_bios, &fw_info) == BP_RESULT_OK) { in dc_create_resource_pool()
155 res_pool->ref_clock_inKhz = fw_info.pll_info.crystal_frequency; in dc_create_resource_pool()
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