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Searched refs:hsync (Results 1 – 6 of 6) sorted by relevance

/dragonfly/sys/dev/drm/
H A Ddrm_modes.c395 int hsync, hfront_porch, vodd_front_porch_lines; in drm_gtf_mode_complex() local
497 hsync = H_SYNC_PERCENT * total_pixels / 100; in drm_gtf_mode_complex()
498 hsync = (hsync + GTF_CELL_GRAN / 2) / GTF_CELL_GRAN; in drm_gtf_mode_complex()
499 hsync = hsync * GTF_CELL_GRAN; in drm_gtf_mode_complex()
501 hfront_porch = hblank / 2 - hsync; in drm_gtf_mode_complex()
508 drm_mode->hsync_end = drm_mode->hsync_start + hsync; in drm_gtf_mode_complex()
748 if (mode->hsync) in drm_mode_hsync()
749 return mode->hsync; in drm_mode_hsync()
H A Ddrm_edid.c2302 int hsync, hmin, hmax; in mode_in_hsync_range() local
2310 hsync = drm_mode_hsync(mode); in mode_in_hsync_range()
2312 return (hsync <= hmax && hsync >= hmin); in mode_in_hsync_range()
4550 unsigned hsync = (timings->hsync[0] | (timings->hsync[1] & 0x7f) << 8) + 1; in drm_mode_displayid_detailed() local
4556 bool hsync_positive = (timings->hsync[1] >> 7) & 0x1; in drm_mode_displayid_detailed()
4564 mode->hsync_start = mode->hdisplay + hsync; in drm_mode_displayid_detailed()
/dragonfly/sys/dev/drm/i915/
H A Dintel_dsi.c1090 u16 hactive, hfp, hsync, hbp, vfp, vsync, vbp; in bxt_dsi_get_pipe_config() local
1133 hsync = I915_READ(MIPI_HSYNC_PADDING_COUNT(port)); in bxt_dsi_get_pipe_config()
1139 hsync = pixels_from_txbyteclkhs(hsync, bpp, lane_count, in bxt_dsi_get_pipe_config()
1146 hsync *= 2; in bxt_dsi_get_pipe_config()
1155 adjusted_mode->crtc_htotal = hactive + hfp + hsync + hbp; in bxt_dsi_get_pipe_config()
1157 adjusted_mode->crtc_hsync_end = hsync + adjusted_mode->crtc_hsync_start; in bxt_dsi_get_pipe_config()
1309 u16 hactive, hfp, hsync, hbp, vfp, vsync, vbp; in set_dsi_timings() local
1313 hsync = adjusted_mode->crtc_hsync_end - adjusted_mode->crtc_hsync_start; in set_dsi_timings()
1321 hsync /= 2; in set_dsi_timings()
1333 hsync = txbyteclkhs(hsync, bpp, lane_count, in set_dsi_timings()
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H A Dintel_display.c7082 mode->hsync = drm_mode_hsync(mode); in intel_mode_from_pipe_config()
15372 u32 hsync; member
15451 error->transcoder[i].hsync = I915_READ(HSYNC(cpu_transcoder)); in intel_display_capture_error_state()
15511 err_printf(m, " HSYNC: %08x\n", error->transcoder[i].hsync); in intel_display_print_error_state()
/dragonfly/sys/dev/drm/include/drm/
H A Ddrm_displayid.h81 u8 hsync[2]; member
H A Ddrm_modes.h404 int hsync; member