Searched refs:max_backends_per_se (Results 1 – 15 of 15) sorted by relevance
920 rdev->config.cayman.max_backends_per_se = 4; in cayman_gpu_init()958 rdev->config.cayman.max_backends_per_se = 2; in cayman_gpu_init()972 rdev->config.cayman.max_backends_per_se = 2; in cayman_gpu_init()986 rdev->config.cayman.max_backends_per_se = 1; in cayman_gpu_init()993 rdev->config.cayman.max_backends_per_se = 1; in cayman_gpu_init()1114 …for (i = 0; i < (rdev->config.cayman.max_backends_per_se * rdev->config.cayman.max_shader_engines)… in cayman_gpu_init()1118 …for (i = 0; i < (rdev->config.cayman.max_backends_per_se * rdev->config.cayman.max_shader_engines)… in cayman_gpu_init()1148 if ((rdev->config.cayman.max_backends_per_se == 1) && in cayman_gpu_init()1160 rdev->config.cayman.max_backends_per_se * in cayman_gpu_init()
385 *value = rdev->config.cik.max_backends_per_se * in radeon_info_ioctl()388 *value = rdev->config.si.max_backends_per_se * in radeon_info_ioctl()391 *value = rdev->config.cayman.max_backends_per_se * in radeon_info_ioctl()
3094 rdev->config.si.max_backends_per_se = 4; in si_gpu_init()3111 rdev->config.si.max_backends_per_se = 4; in si_gpu_init()3129 rdev->config.si.max_backends_per_se = 4; in si_gpu_init()3146 rdev->config.si.max_backends_per_se = 2; in si_gpu_init()3163 rdev->config.si.max_backends_per_se = 1; in si_gpu_init()3280 rdev->config.si.max_backends_per_se); in si_gpu_init()
2105 unsigned max_backends_per_se; member2144 unsigned max_backends_per_se; member2175 unsigned max_backends_per_se; member
2358 u32 num_rbs = rdev->config.cik.max_backends_per_se * in cik_tiling_mode_table_init()3215 rdev->config.cik.max_backends_per_se = 2; in cik_gpu_init()3232 rdev->config.cik.max_backends_per_se = 4; in cik_gpu_init()3248 rdev->config.cik.max_backends_per_se = 2; in cik_gpu_init()3268 rdev->config.cik.max_backends_per_se = 1; in cik_gpu_init()3370 rdev->config.cik.max_backends_per_se); in cik_gpu_init()
348 adev->gfx.config.max_backends_per_se = gfx_info->v24.gc_num_rb_per_se; in amdgpu_atomfirmware_get_gfx_info()
1797 adev->gfx.config.max_backends_per_se = 2; in gfx_v8_0_gpu_early_init()1814 adev->gfx.config.max_backends_per_se = 4; in gfx_v8_0_gpu_early_init()1861 adev->gfx.config.max_backends_per_se = 2; in gfx_v8_0_gpu_early_init()1877 adev->gfx.config.max_backends_per_se = 2; in gfx_v8_0_gpu_early_init()1894 adev->gfx.config.max_backends_per_se = 1; in gfx_v8_0_gpu_early_init()1912 adev->gfx.config.max_backends_per_se = 2; in gfx_v8_0_gpu_early_init()3586 mask = amdgpu_gfx_create_bitmask(adev->gfx.config.max_backends_per_se / in gfx_v8_0_get_rb_active_bitmap()3748 u32 rb_bitmap_width_per_sh = adev->gfx.config.max_backends_per_se / in gfx_v8_0_setup_rb()3766 num_rb_pipes = min_t(unsigned, adev->gfx.config.max_backends_per_se * in gfx_v8_0_setup_rb()
489 config[no_regs++] = adev->gfx.config.max_backends_per_se; in amdgpu_debugfs_gca_config_read()
728 adev->gfx.config.max_backends_per_se = gfx_info->info.max_backends_per_se; in amdgpu_atombios_get_gfx_info()
592 dev_info.num_rb_pipes = adev->gfx.config.max_backends_per_se * in amdgpu_info_ioctl()
815 unsigned max_backends_per_se; member
1703 mask = amdgpu_gfx_create_bitmask(adev->gfx.config.max_backends_per_se / in gfx_v9_0_get_rb_active_bitmap()1714 u32 rb_bitmap_width_per_sh = adev->gfx.config.max_backends_per_se / in gfx_v9_0_setup_rb()
1440 adev->gfx.config.max_backends_per_se = le32_to_cpu(gpu_info_fw->gc_num_rb_per_se); in amdgpu_device_parse_gpu_info_fw()
1193 uint8_t max_backends_per_se; member1213 uint8_t max_backends_per_se; member
5654 UCHAR max_backends_per_se; member