/dragonfly/sys/dev/drm/include/linux/ |
H A D | kernel.h | 82 #define max_t(type, _x, _y) ((type)(_x) > (type)(_y) ? (type)(_x) : (type)(_y)) macro 84 #define clamp_t(type, _x, min, max) min_t(type, max_t(type, _x, min), max)
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/dragonfly/sys/dev/drm/i915/ |
H A D | i915_gem_internal.c | 64 max_segment = max_t(unsigned int, max_segment, in i915_gem_object_get_pages_internal()
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H A D | i915_vma.c | 475 size = max_t(typeof(size), size, vma->fence_size); in i915_vma_insert() 476 alignment = max_t(typeof(alignment), in i915_vma_insert()
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H A D | intel_sdvo.c | 416 pos += snprintf(buffer + pos, max_t(int, BUF_LEN - pos, 0), args) in intel_sdvo_debug_write() 572 pos += snprintf(buffer + pos, max_t(int, BUF_LEN - pos, 0), args) in intel_sdvo_read_response()
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H A D | intel_overlay.c | 865 swidthsw |= max_t(u32, tmp_U, tmp_V) << 16; in intel_overlay_do_put_image()
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H A D | intel_pm.c | 2956 wm[level] = max_t(uint16_t, wm[level], DIV_ROUND_UP(min, 5)); in ilk_increase_wm_latency() 7034 return max_t(u32, val, 0xc0); in valleyview_rps_min_freq() 7931 max_t(int, in intel_init_gt_powersave()
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H A D | i915_gem.c | 4264 vma->display_alignment = max_t(u64, vma->display_alignment, alignment); in i915_gem_object_pin_to_display_plane()
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H A D | intel_dp.c | 5275 vbt.t11_t12 = max_t(u16, vbt.t11_t12, 1300 * 10); in intel_dp_init_panel_power_sequencer()
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/dragonfly/sys/dev/drm/radeon/ |
H A D | si_dpm.h | 77 u32 max_t; member
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H A D | si_dpm.c | 1843 u32 t_max = dte_data->max_t; in si_update_dte_from_pl2() 2503 dte_tables->MaxT = cpu_to_be32(dte_data->max_t); in si_initialize_smc_dte_tables()
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/dragonfly/sys/dev/virtual/amazon/ena/ena-com/ |
H A D | ena_plat.h | 194 #define max_t(type, _x, _y) ((type)(_x) > (type)(_y) ? (type)(_x) : (type)(_y)) macro
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/dragonfly/sys/dev/drm/ |
H A D | drm_fb_helper.c | 982 clip->x2 = max_t(u32, clip->x2, x + width); 983 clip->y2 = max_t(u32, clip->y2, y + height); 1830 sizes.surface_width = max_t(u32, desired_mode->hdisplay + x, sizes.surface_width); in drm_fb_helper_single_fb_probe() 1831 sizes.surface_height = max_t(u32, desired_mode->vdisplay + y, sizes.surface_height); in drm_fb_helper_single_fb_probe()
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H A D | drm_syncobj.c | 720 ret = max_t(signed long, timeout, 1);
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/dragonfly/sys/dev/drm/amd/amdgpu/ |
H A D | si_dpm.h | 893 u32 max_t; member
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H A D | gfx_v8_0.c | 3638 unsigned sh_per_se = max_t(unsigned, adev->gfx.config.max_sh_per_se, 1); in gfx_v8_0_write_harvested_raster_configs() 3639 unsigned num_se = max_t(unsigned, adev->gfx.config.max_shader_engines, 1); in gfx_v8_0_write_harvested_raster_configs()
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H A D | si_dpm.c | 1933 u32 t_max = dte_data->max_t; in si_update_dte_from_pl2() 2599 dte_tables->MaxT = cpu_to_be32(dte_data->max_t); in si_initialize_smc_dte_tables()
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