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Searched refs:mclk_edc_wr_enable_threshold (Results 1 – 12 of 12) sorted by relevance

/dragonfly/sys/dev/drm/radeon/
H A Dcypress_dpm.h82 u32 mclk_edc_wr_enable_threshold; member
H A Dci_dpm.h213 u32 mclk_edc_wr_enable_threshold; member
H A Dni_dpm.c2337 if (pl->mclk > eg_pi->mclk_edc_wr_enable_threshold) in ni_convert_power_level_to_smc()
4127 eg_pi->mclk_edc_wr_enable_threshold = 55000; in ni_dpm_init()
4131 eg_pi->mclk_edc_wr_enable_threshold = 40000; in ni_dpm_init()
4133 ni_pi->mclk_rtt_mode_threshold = eg_pi->mclk_edc_wr_enable_threshold; in ni_dpm_init()
H A Dcypress_dpm.c710 if (pl->mclk > eg_pi->mclk_edc_wr_enable_threshold) in cypress_convert_power_level_to_smc()
2064 eg_pi->mclk_edc_wr_enable_threshold = 40000; in cypress_dpm_init()
H A Dbtc_dpm.c2611 eg_pi->mclk_edc_wr_enable_threshold = 40000; in btc_dpm_init()
H A Dci_dpm.c2981 if (pi->mclk_edc_wr_enable_threshold && in ci_populate_single_memory_level()
2982 (memory_clock > pi->mclk_edc_wr_enable_threshold)) in ci_populate_single_memory_level()
5790 pi->mclk_edc_wr_enable_threshold = 40000; in ci_dpm_init()
H A Dsi_dpm.c5014 if (pl->mclk > eg_pi->mclk_edc_wr_enable_threshold) in si_convert_power_level_to_smc()
6980 eg_pi->mclk_edc_wr_enable_threshold = 40000; in si_dpm_init()
6982 ni_pi->mclk_rtt_mode_threshold = eg_pi->mclk_edc_wr_enable_threshold; in si_dpm_init()
/dragonfly/sys/dev/drm/amd/amdgpu/
H A Dsi_dpm.h666 u32 mclk_edc_wr_enable_threshold; member
H A Dsi_dpm.c5477 if (pl->mclk > eg_pi->mclk_edc_wr_enable_threshold) in si_convert_power_level_to_smc()
7385 eg_pi->mclk_edc_wr_enable_threshold = 40000; in si_dpm_init()
7387 ni_pi->mclk_rtt_mode_threshold = eg_pi->mclk_edc_wr_enable_threshold; in si_dpm_init()
/dragonfly/sys/dev/drm/amd/powerplay/smumgr/
H A Diceland_smumgr.c1236 uint32_t mclk_edc_wr_enable_threshold = 40000; in iceland_populate_single_memory_level() local
1300 if ((mclk_edc_wr_enable_threshold != 0) && in iceland_populate_single_memory_level()
1301 (memory_clock > mclk_edc_wr_enable_threshold)) { in iceland_populate_single_memory_level()
H A Dci_smumgr.c1181 uint32_t mclk_edc_wr_enable_threshold = 40000; in ci_populate_single_memory_level() local
1252 if ((mclk_edc_wr_enable_threshold != 0) && in ci_populate_single_memory_level()
1253 (memory_clock > mclk_edc_wr_enable_threshold)) { in ci_populate_single_memory_level()
H A Dtonga_smumgr.c958 uint32_t mclk_edc_wr_enable_threshold = 40000; in tonga_populate_single_memory_level() local
1030 if ((mclk_edc_wr_enable_threshold != 0) && in tonga_populate_single_memory_level()
1031 (memory_clock > mclk_edc_wr_enable_threshold)) { in tonga_populate_single_memory_level()