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Searched refs:mmCRTC0_CRTC_V_SYNC_B_CNTL (Results 1 – 6 of 6) sorted by relevance

/dragonfly/sys/dev/drm/amd/include/asic_reg/dce/
H A Ddce_6_0_d.h559 #define mmCRTC0_CRTC_V_SYNC_B_CNTL 0x1B91 macro
H A Ddce_8_0_d.h264 #define mmCRTC0_CRTC_V_SYNC_B_CNTL 0x1b91 macro
H A Ddce_10_0_d.h301 #define mmCRTC0_CRTC_V_SYNC_B_CNTL 0x1b91 macro
H A Ddce_11_0_d.h239 #define mmCRTC0_CRTC_V_SYNC_B_CNTL 0x1b91 macro
H A Ddce_11_2_d.h246 #define mmCRTC0_CRTC_V_SYNC_B_CNTL 0x1b91 macro
H A Ddce_12_0_offset.h4090 #define mmCRTC0_CRTC_V_SYNC_B_CNTL … macro