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Searched refs:mmCRTC_VERT_SYNC_CONTROL (Results 1 – 6 of 6) sorted by relevance

/dragonfly/sys/dev/drm/amd/display/dc/dce110/
H A Ddce110_timing_generator.c1651 value = dm_read_reg(tg->ctx, CRTC_REG(mmCRTC_VERT_SYNC_CONTROL)); in dce110_timing_generator_enable_crtc_reset()
1666 value = dm_read_reg(tg->ctx, CRTC_REG(mmCRTC_VERT_SYNC_CONTROL)); in dce110_timing_generator_enable_crtc_reset()
1678 dm_write_reg(tg->ctx, CRTC_REG(mmCRTC_VERT_SYNC_CONTROL), value); in dce110_timing_generator_enable_crtc_reset()
1730 value = dm_read_reg(tg->ctx, CRTC_REG(mmCRTC_VERT_SYNC_CONTROL)); in dce110_timing_generator_disable_reset_trigger()
1742 dm_write_reg(tg->ctx, CRTC_REG(mmCRTC_VERT_SYNC_CONTROL), value); in dce110_timing_generator_disable_reset_trigger()
1781 CRTC_REG(mmCRTC_VERT_SYNC_CONTROL)); in dce110_timing_generator_did_triggered_reset_occur()
/dragonfly/sys/dev/drm/amd/include/asic_reg/dce/
H A Ddce_6_0_d.h1018 #define mmCRTC_VERT_SYNC_CONTROL 0x1BAC macro
H A Ddce_8_0_d.h445 #define mmCRTC_VERT_SYNC_CONTROL 0x1bac macro
H A Ddce_10_0_d.h516 #define mmCRTC_VERT_SYNC_CONTROL 0x1bac macro
H A Ddce_11_0_d.h427 #define mmCRTC_VERT_SYNC_CONTROL 0x1bac macro
H A Ddce_11_2_d.h434 #define mmCRTC_VERT_SYNC_CONTROL 0x1bac macro