Searched refs:mmDCCG_PLL0_PLL_IDCLK_CNTL (Results 1 – 2 of 2) sorted by relevance
| /dragonfly/sys/dev/drm/amd/include/asic_reg/dce/ | ||
| H A D | dce_6_0_d.h | 1152 #define mmDCCG_PLL0_PLL_IDCLK_CNTL 0x1706 macro |
| H A D | dce_8_0_d.h | 1115 #define mmDCCG_PLL0_PLL_IDCLK_CNTL 0x1706 macro |