Home
last modified time | relevance | path

Searched refs:mmDCIO_GSL_GENLK_PAD_CNTL (Results 1 – 7 of 7) sorted by relevance

/dragonfly/sys/dev/drm/amd/include/asic_reg/dce/
H A Ddce_6_0_d.h1352 #define mmDCIO_GSL_GENLK_PAD_CNTL 0x1922 macro
H A Ddce_8_0_d.h1290 #define mmDCIO_GSL_GENLK_PAD_CNTL 0x1922 macro
H A Ddce_10_0_d.h1577 #define mmDCIO_GSL_GENLK_PAD_CNTL 0x4824 macro
H A Ddce_11_0_d.h1402 #define mmDCIO_GSL_GENLK_PAD_CNTL 0x4824 macro
H A Ddce_11_2_d.h1482 #define mmDCIO_GSL_GENLK_PAD_CNTL 0x4824 macro
H A Ddce_12_0_offset.h1868 #define mmDCIO_GSL_GENLK_PAD_CNTL … macro
/dragonfly/sys/dev/drm/amd/include/asic_reg/dcn/
H A Ddcn_1_0_offset.h10403 #define mmDCIO_GSL_GENLK_PAD_CNTL … macro