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Searched refs:mmDCP1_DCP_GSL_CONTROL (Results 1 – 6 of 6) sorted by relevance

/dragonfly/sys/dev/drm/amd/include/asic_reg/dce/
H A Ddce_6_0_d.h1680 #define mmDCP1_DCP_GSL_CONTROL 0x1D90 macro
H A Ddce_8_0_d.h2524 #define mmDCP1_DCP_GSL_CONTROL 0x1d90 macro
H A Ddce_10_0_d.h3303 #define mmDCP1_DCP_GSL_CONTROL 0x1c90 macro
H A Ddce_11_0_d.h3064 #define mmDCP1_DCP_GSL_CONTROL 0x1c90 macro
H A Ddce_11_2_d.h4295 #define mmDCP1_DCP_GSL_CONTROL 0x1c90 macro
H A Ddce_12_0_offset.h4532 #define mmDCP1_DCP_GSL_CONTROL … macro