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Searched refs:mmDCP1_INPUT_CSC_CONTROL (Results 1 – 6 of 6) sorted by relevance

/dragonfly/sys/dev/drm/amd/include/asic_reg/dce/
H A Ddce_6_0_d.h1728 #define mmDCP1_INPUT_CSC_CONTROL 0x1D35 macro
H A Ddce_8_0_d.h1901 #define mmDCP1_INPUT_CSC_CONTROL 0x1d35 macro
H A Ddce_10_0_d.h2750 #define mmDCP1_INPUT_CSC_CONTROL 0x1c35 macro
H A Ddce_11_0_d.h2504 #define mmDCP1_INPUT_CSC_CONTROL 0x1c35 macro
H A Ddce_11_2_d.h3735 #define mmDCP1_INPUT_CSC_CONTROL 0x1c35 macro
H A Ddce_12_0_offset.h4372 #define mmDCP1_INPUT_CSC_CONTROL … macro