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Searched refs:mmDCP1_OUTPUT_CSC_C11_C12 (Results 1 – 6 of 6) sorted by relevance

/dragonfly/sys/dev/drm/amd/include/asic_reg/dce/
H A Ddce_6_0_d.h1735 #define mmDCP1_OUTPUT_CSC_C11_C12 0x1D3D macro
H A Ddce_8_0_d.h1957 #define mmDCP1_OUTPUT_CSC_C11_C12 0x1d3d macro
H A Ddce_10_0_d.h2806 #define mmDCP1_OUTPUT_CSC_C11_C12 0x1c3d macro
H A Ddce_11_0_d.h2560 #define mmDCP1_OUTPUT_CSC_C11_C12 0x1c3d macro
H A Ddce_11_2_d.h3791 #define mmDCP1_OUTPUT_CSC_C11_C12 0x1c3d macro
H A Ddce_12_0_offset.h4388 #define mmDCP1_OUTPUT_CSC_C11_C12 macro