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Searched refs:mmDCP1_REGAMMA_CNTLA_END_CNTL2 (Results 1 – 6 of 6) sorted by relevance

/dragonfly/sys/dev/drm/amd/include/asic_reg/dce/
H A Ddce_6_0_d.h1772 #define mmDCP1_REGAMMA_CNTLA_END_CNTL2 0x1DA7 macro
H A Ddce_8_0_d.h2650 #define mmDCP1_REGAMMA_CNTLA_END_CNTL2 0x1da7 macro
H A Ddce_10_0_d.h3429 #define mmDCP1_REGAMMA_CNTLA_END_CNTL2 0x1ca7 macro
H A Ddce_11_0_d.h3190 #define mmDCP1_REGAMMA_CNTLA_END_CNTL2 0x1ca7 macro
H A Ddce_11_2_d.h4421 #define mmDCP1_REGAMMA_CNTLA_END_CNTL2 0x1ca7 macro
H A Ddce_12_0_offset.h4556 #define mmDCP1_REGAMMA_CNTLA_END_CNTL2 … macro