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Searched refs:mmDCP3_REGAMMA_CNTLA_END_CNTL1 (Results 1 – 6 of 6) sorted by relevance

/dragonfly/sys/dev/drm/amd/include/asic_reg/dce/
H A Ddce_6_0_d.h2097 #define mmDCP3_REGAMMA_CNTLA_END_CNTL1 0x43A6 macro
H A Ddce_8_0_d.h2645 #define mmDCP3_REGAMMA_CNTLA_END_CNTL1 0x43a6 macro
H A Ddce_10_0_d.h3424 #define mmDCP3_REGAMMA_CNTLA_END_CNTL1 0x40a6 macro
H A Ddce_11_0_d.h3185 #define mmDCP3_REGAMMA_CNTLA_END_CNTL1 0x40a6 macro
H A Ddce_11_2_d.h4416 #define mmDCP3_REGAMMA_CNTLA_END_CNTL1 0x40a6 macro
H A Ddce_12_0_offset.h6110 #define mmDCP3_REGAMMA_CNTLA_END_CNTL1 … macro