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Searched refs:mmDCP3_REGAMMA_CNTLB_START_CNTL (Results 1 – 6 of 6) sorted by relevance

/dragonfly/sys/dev/drm/amd/include/asic_reg/dce/
H A Ddce_6_0_d.h2120 #define mmDCP3_REGAMMA_CNTLB_START_CNTL 0x43B0 macro
H A Ddce_8_0_d.h2715 #define mmDCP3_REGAMMA_CNTLB_START_CNTL 0x43b0 macro
H A Ddce_10_0_d.h3494 #define mmDCP3_REGAMMA_CNTLB_START_CNTL 0x40b0 macro
H A Ddce_11_0_d.h3255 #define mmDCP3_REGAMMA_CNTLB_START_CNTL 0x40b0 macro
H A Ddce_11_2_d.h4486 #define mmDCP3_REGAMMA_CNTLB_START_CNTL 0x40b0 macro
H A Ddce_12_0_offset.h6130 #define mmDCP3_REGAMMA_CNTLB_START_CNTL macro