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Searched refs:mmDCP5_DCP_LB_DATA_GAP_BETWEEN_CHUNK (Results 1 – 6 of 6) sorted by relevance

/dragonfly/sys/dev/drm/amd/include/asic_reg/dce/
H A Ddce_6_0_d.h2333 #define mmDCP5_DCP_LB_DATA_GAP_BETWEEN_CHUNK 0x4991 macro
H A Ddce_8_0_d.h2535 #define mmDCP5_DCP_LB_DATA_GAP_BETWEEN_CHUNK 0x4991 macro
H A Ddce_10_0_d.h3314 #define mmDCP5_DCP_LB_DATA_GAP_BETWEEN_CHUNK 0x4491 macro
H A Ddce_11_0_d.h3075 #define mmDCP5_DCP_LB_DATA_GAP_BETWEEN_CHUNK 0x4491 macro
H A Ddce_11_2_d.h4306 #define mmDCP5_DCP_LB_DATA_GAP_BETWEEN_CHUNK 0x4491 macro
H A Ddce_12_0_offset.h7648 #define mmDCP5_DCP_LB_DATA_GAP_BETWEEN_CHUNK … macro