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Searched refs:mmDCP5_GRPH_INTERRUPT_STATUS (Results 1 – 6 of 6) sorted by relevance

/dragonfly/sys/dev/drm/amd/include/asic_reg/dce/
H A Ddce_6_0_d.h2356 #define mmDCP5_GRPH_INTERRUPT_STATUS 0x4916 macro
H A Ddce_8_0_d.h1688 #define mmDCP5_GRPH_INTERRUPT_STATUS 0x4916 macro
H A Ddce_10_0_d.h2537 #define mmDCP5_GRPH_INTERRUPT_STATUS 0x4416 macro
H A Ddce_11_0_d.h2431 #define mmDCP5_GRPH_INTERRUPT_STATUS 0x4416 macro
H A Ddce_11_2_d.h3662 #define mmDCP5_GRPH_INTERRUPT_STATUS 0x4416 macro
H A Ddce_12_0_offset.h7464 #define mmDCP5_GRPH_INTERRUPT_STATUS macro