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Searched refs:mmDCP5_REGAMMA_CNTLB_END_CNTL1 (Results 1 – 6 of 6) sorted by relevance

/dragonfly/sys/dev/drm/amd/include/asic_reg/dce/
H A Ddce_6_0_d.h2435 #define mmDCP5_REGAMMA_CNTLB_END_CNTL1 0x49B2 macro
H A Ddce_8_0_d.h2731 #define mmDCP5_REGAMMA_CNTLB_END_CNTL1 0x49b2 macro
H A Ddce_10_0_d.h3510 #define mmDCP5_REGAMMA_CNTLB_END_CNTL1 0x44b2 macro
H A Ddce_11_0_d.h3271 #define mmDCP5_REGAMMA_CNTLB_END_CNTL1 0x44b2 macro
H A Ddce_11_2_d.h4502 #define mmDCP5_REGAMMA_CNTLB_END_CNTL1 0x44b2 macro
H A Ddce_12_0_offset.h7692 #define mmDCP5_REGAMMA_CNTLB_END_CNTL1 … macro