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Searched refs:mmDCP5_REGAMMA_CNTLB_END_CNTL2 (Results 1 – 6 of 6) sorted by relevance

/dragonfly/sys/dev/drm/amd/include/asic_reg/dce/
H A Ddce_6_0_d.h2436 #define mmDCP5_REGAMMA_CNTLB_END_CNTL2 0x49B3 macro
H A Ddce_8_0_d.h2738 #define mmDCP5_REGAMMA_CNTLB_END_CNTL2 0x49b3 macro
H A Ddce_10_0_d.h3517 #define mmDCP5_REGAMMA_CNTLB_END_CNTL2 0x44b3 macro
H A Ddce_11_0_d.h3278 #define mmDCP5_REGAMMA_CNTLB_END_CNTL2 0x44b3 macro
H A Ddce_11_2_d.h4509 #define mmDCP5_REGAMMA_CNTLB_END_CNTL2 0x44b3 macro
H A Ddce_12_0_offset.h7694 #define mmDCP5_REGAMMA_CNTLB_END_CNTL2 macro