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Searched refs:mmDF_PIE_AON0_DfGlobalClkGater (Results 1 – 4 of 4) sorted by relevance

/dragonfly/sys/dev/drm/amd/amdgpu/
H A Ddf_v1_7.c79 tmp = RREG32_SOC15(DF, 0, mmDF_PIE_AON0_DfGlobalClkGater); in df_v1_7_update_medium_grain_clock_gating()
82 WREG32_SOC15(DF, 0, mmDF_PIE_AON0_DfGlobalClkGater, tmp); in df_v1_7_update_medium_grain_clock_gating()
84 tmp = RREG32_SOC15(DF, 0, mmDF_PIE_AON0_DfGlobalClkGater); in df_v1_7_update_medium_grain_clock_gating()
87 WREG32_SOC15(DF, 0, mmDF_PIE_AON0_DfGlobalClkGater, tmp); in df_v1_7_update_medium_grain_clock_gating()
100 tmp = RREG32_SOC15(DF, 0, mmDF_PIE_AON0_DfGlobalClkGater); in df_v1_7_get_clockgating_state()
H A Ddf_v3_6.c84 mmDF_PIE_AON0_DfGlobalClkGater); in df_v3_6_update_medium_grain_clock_gating()
88 mmDF_PIE_AON0_DfGlobalClkGater, tmp); in df_v3_6_update_medium_grain_clock_gating()
91 mmDF_PIE_AON0_DfGlobalClkGater); in df_v3_6_update_medium_grain_clock_gating()
95 mmDF_PIE_AON0_DfGlobalClkGater, tmp); in df_v3_6_update_medium_grain_clock_gating()
109 tmp = RREG32_SOC15(DF, 0, mmDF_PIE_AON0_DfGlobalClkGater); in df_v3_6_get_clockgating_state()
/dragonfly/sys/dev/drm/amd/include/asic_reg/df/
H A Ddf_3_6_offset.h27 #define mmDF_PIE_AON0_DfGlobalClkGater 0x00fc macro
H A Ddf_1_7_offset.h27 #define mmDF_PIE_AON0_DfGlobalClkGater 0x00fc macro