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Searched refs:mmDIG0_AFMT_RAMP_CONTROL2 (Results 1 – 7 of 7) sorted by relevance

/dragonfly/sys/dev/drm/amd/include/asic_reg/dce/
H A Ddce_6_0_d.h2517 #define mmDIG0_AFMT_RAMP_CONTROL2 0x1C46 macro
H A Ddce_8_0_d.h3304 #define mmDIG0_AFMT_RAMP_CONTROL2 0x1c46 macro
H A Ddce_10_0_d.h4083 #define mmDIG0_AFMT_RAMP_CONTROL2 0x4a3d macro
H A Ddce_11_0_d.h3978 #define mmDIG0_AFMT_RAMP_CONTROL2 0x4a3d macro
H A Ddce_11_2_d.h5209 #define mmDIG0_AFMT_RAMP_CONTROL2 0x4a3d macro
H A Ddce_12_0_offset.h10146 #define mmDIG0_AFMT_RAMP_CONTROL2 macro
/dragonfly/sys/dev/drm/amd/include/asic_reg/dcn/
H A Ddcn_1_0_offset.h8287 #define mmDIG0_AFMT_RAMP_CONTROL2 macro